11.2 Physical Memory Map

The high-speed bus is implemented as a bus matrix. All high-speed bus addresses are fixed and are never remapped in any way, even during boot. The 32-bit physical address space is mapped as follows:

Table 11-1. Physical Memory Map
MemoryStart AddressSize in KB (unless otherwise stated)
PIC32CK2051xxPIC32CK1025xxPIC32CK0512xx
Tightly Coupled Memory (TCM)0x0000_0000444
Boot Flash Memory0x0800_0000128128128
Configuration Flash Memory0x0A00_0000646464
Program Flash Memory0x0C00_000020481024512
Embedded SRAM0x2000_0000512256128
Peripheral Bridge A0x4400_0000256256256
Peripheral Bridge B0x4480_0000256256256
Peripheral Bridge C0x4500_0000256256256
Independent Peripherals0x4600_0000999