37.7.6 Pad Calibration

The Pad Calibration values must be loaded from the CAL OTP into the USB Pad Calibration register by software, after enabling the USB, to achieve the specified accuracy.

Name:	PADCAL
Offset:	0x28
Reset:	0x0000
Property:	PAC Write-Protection


Bit	15	14	13	12	11	10	9	8
		TRIM[2:0]				TRANSN[4:2]
Access		R/W	R/W	R/W		R/W	R/W	R/W
Reset		0	0	0		0	0	0


Bit	7	6	5	4	3	2	1	0
	TRANSN[1:0]			TRANSP[4:0]
Access	R/W	R/W		R/W	R/W	R/W	R/W	R/W
Reset	0	0		0	0	0	0	0

Bits 14:12 – TRIM[2:0] Trim bits for DP/DMBit 14: RISEBit 13: FALLBit 12: VCSH

These bits calibrate the matching of rise/fall of DP/DM.

Bits 10:6 – TRANSN[4:0] Trimmable Output Driver Impedance N

These bits calibrate the NMOS output impedance of DP/DM drivers.

Bits 4:0 – TRANSP[4:0] Trimmable Output Driver Impedance P

These bits calibrate the PMOS output impedance of DP/DM drivers.