34.5.1 Principle of Operation

The basic structure of the SERCOM serial engine is shown in the following figure.

• The transmitter consists of a single write buffer and a Shift register
• The receiver consists of a one-level (I²C), two-level (USART, SPI) receive buffer and a Shift register

The baud-rate generator is capable of running on the GCLK_SERCOMn_CORE clock or an external clock.

Address matching logic is included for SPI and I²C operation.