30.2.22 Errors and Flags
Several non-typical events can occur that affect the operation of the FCW causing Write/Erase operations to be aborted. Setup errors can occur that prevent the start of an NVMOP command. All these errors are reported via INTFLAG. Some flags are updated before the FSM clears BUSY. However, the FSM always clears BUSY and sets DONE on the same clock edge.
The following table describes the types of errors the FCW detects and what flags they affect.
INTFLAGs: | Source: | Effect on FCW Operations: |
---|---|---|
WRERR, DONE | Any Error Event during NVMOP | Last address programmed may be corrupted, or last erase may not be complete. |
RSTERR, DONE | BOR circuit not Ready before NVMOP written | NVMOP not started(2) SW should enable BOR and wait for it to be ready. |
RSTERR(1) | Reset or Low Voltage Event before FSM starts NVMOP | NVMOP not started(2) |
RSTERR(1), WRERR | Reset or Low Voltage Event after FSM starts NVMOP | Last address programmed may be corrupted, or last erase may not be complete. Software should verify results. |
HTDPGM, DONE | High Temp Event before FSM starts NVMOP | NVMOP not started(2) |
WRERR, SECERR, DONE | Security module or tamper event preempted operation | Last address programmed may be corrupted, or last erase may not be complete. |
KEYERR | KEY not valid for SFR write | SFR not updated |
CFGERR, DONE | ADDR not in flash memory space Disallowed CPUDAL setting. | NVMOP is not started (2) |
CFGERR, OPERR, DONE | NVMOP not allowed because of ECC, i.e. Single Write attempted when ECC Write with ECC Read is selected | NVMOP is not started (2) |
WRERR, FIFOERR, DONE | Row Write FIFO under run error | NVMOP is
aborted(2) Subsequent addresses not programmed |
BUSERR, FIFOERR(3), DONE | AHB Bus Host error before FIFO filled Possible SRCADDR out of range | NVMOP is not started(2) |
BUSERR, FIFOERR(3), WRERR, DONE | AHB Bus Host error Possible SRCADDR out of range or access permission violation | NVMOP is aborted(2) Current and subsequent addresses not programmed |
WPERR, DONE | ADDR is write protected by a WP
register (i.e BWP, PWP, etc) | NVMOP is not started(2) |
WPERR, SECERR, DONE | ADDR is write protected by a different security association(4) | NVMOP is not started(2) |
OPERR, DONE | NVMOP is not available (e.g. RSVD) | NVMOP is not started(2) |
SECERR | Security Violation | SFR access blocked Does not generate a bus error |
Note:
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The following table summarizes events that cause the Write/Erase sequence to not occur but do not set the error flag.
Source: | Effect on FCW Operations: |
---|---|
Writing KEY with an invalid value. | Locks all registers protected by KEY. |
Attempted write of an SFR while locked for programming (BUSY=1) from the same security association. | Action is ignored by FSM and SFRs. Reports a bus error. |
Attempted read or write of an SFR address that is not implemented. | Action is ignored by FSM and SFRs. Reports a bus error. |