34.6.3 Block Diagram

Table 34-4. USART Pin Configuration
Pin	Pin Configuration
TxD	Output
RxD	Input
XCK	Output or input

The combined configuration of PORT and the Transmit Data Pinout and Receive Data Pinout bit fields in the Control A register (CTRLA.TXPO and CTRLA.RXPO, respectively) will define the pad assignments of the USART signals as shown in the table above.

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