Silicon Issue Summary
| Module | Feature | Item No. | Issue Summary | Affected Revisions | ||
|---|---|---|---|---|---|---|
| B0 | B1 | B2 | ||||
| Analog-to-Digital Converter with Computation (ADCC) | Acquisition Time | 1.1.1 | Acquisition time cannot be changed through either the ADACQ or the ADPRE registers. | X | ||
| ADC Voltage Reference | 1.1.2 | RA2 is not working as VREF- in Single-Ended mode. | X | X | ||
| Digital-to-Analog Converter (DAC) | DAC Auto Enable | 1.2.1 | Mid-band voltage spike at code 128 may occur when DACAUTOEN is enabled and the application is incrementing the DACxDATL register from 127 to 129. | X | ||
| DAC2 Output | 1.2.2 | The DAC2 Output is not Connected to the Comparators. | X | X | X | |
| Fixed Voltage Reference (FVR) | ADC Buffer | 1.3.1 | Power-down current (IPD) for the ADC FVR Buffer may be higher than the current data sheet limits. | X | ||
| Timer1 | Timer1 Gate Source | 1.4.1 | Changing the Timer1 Gate Source May Cause Unexpected Interrupts | X | X | |
| Charge Pump | CPON | 1.5.1 | The CPON Bits Incorrectly Default to OFF Mode | X | X | X |
| Capture/Compare/PWM (CCP) | Compare Toggle Mode | 1.6.1 | CCP Compare Toggle Output Mode Does Not Work as Expected | X | X | X |
|
Note:
Only those issues indicated in the last column
apply to the current silicon revision.
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