40.7.1.2 Receive Buffer List

Receive data is written to areas of data (i.e., buffers) in system memory. These buffers are listed in another data structure that also resides in main memory. This data structure (receive buffer queue) is a sequence of descriptor entries as defined in Receive Buffer Descriptor Entry.

The Receive Buffer Queue Pointer register points to this data structure.

Figure 40-4. Receive Buffer List

To create the list of buffers:

  1. Allocate a number (N) of buffers of X bytes in system memory, where X is the DMA buffer length programmed in the DMA Configuration register.
  2. Allocate an area 8N bytes for the receive buffer descriptor list in system memory and create N entries in this list. Mark all entries in this list as owned by GMAC, i.e., bit 0 of word 0 set to 0.
  3. Add an extra descriptor to the end of queue with its used bit set (bit 0 in word 0 set to 1). This last descriptor in the queue may also have its wrap bit set (bit 1 in word 0 set to 1) in addition to its used bit.When receive is enabled, at least one entry in the buffer descriptor ring needs its used bit set, so it is not sufficient to set the wrap bit of the last buffer in the queue without also setting its used bit. The GMAC can now prefetch receive descriptors and the used bit is used as an indication to the hardware that all available descriptors have been prefetched.
  4. The GMAC can now read transmit data so fast that all data may be read in before it sets the used bit of the first buffer descriptor in the queue.
  5. Write address of receive buffer descriptor list and control information to GMAC register receive buffer queue pointer
  6. The receive circuits can then be enabled by writing to the address recognition registers and the Network Control register.
    Note: The queue pointers must be initialized and point to USED descriptors for all queues including those not intended for use.