33.22.9 PMC Clock Generator Main Clock Frequency Register

This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode Register.

Name:	CKGR_MCFR
Offset:	0x0024
Reset:	0x00000000
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24
								CCSS
Access								R/W
Reset								0


Bit	23	22	21	20	19	18	17	16
				RCMEAS				MAINFRDY
Access				R/W				R/W
Reset				0				0


Bit	15	14	13	12	11	10	9	8
	MAINF[15:8]
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	MAINF[7:0]
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0

Bit 24 – CCSS Counter Clock Source Selection

Value	Description
0	The clock of the MAINF counter is the RC oscillator.
1	The clock of the MAINF counter is the crystal oscillator.

Bit 20 – RCMEAS RC Oscillator Frequency Measure (write-only)

The measure is performed on the main frequency (i.e., not limited to RC oscillator only), but if the Main clock frequency source is the 8 to 24 MHz crystal oscillator, the restart of measuring is not needed because of the well known stability of crystal oscillators.

Value	Description
0	No effect.
1	Restarts measuring of the frequency of the Main clock source. MAINF will carry the new frequency as soon as a low to high transition occurs on the MAINFRDY flag.

Bit 16 – MAINFRDY Main Clock Frequency Measure Ready

To ensure that a correct value is read on the MAINF field, the MAINFRDY flag must be read at 1, then another read access must be performed on the register to get a stable value on the MAINF field.

Value	Description
0	MAINF value is not valid or the measured oscillator is disabled or a measure has just been started by means of RCMEAS.
1	The measured oscillator has been enabled previously and MAINF value is available.

Bits 15:0 – MAINF[15:0] Main Clock Frequency

Gives the number of cycles of the clock selected by the bit CCSS within 16 Slow clock periods. To calculate the frequency of the measured clock:

f_SELCK = (MAINF × f_SLCK) / 16

where frequency is in MHz.