33.22.9 PMC Clock Generator Main Clock Frequency Register

This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode Register.

Name: CKGR_MCFR
Offset: 0x0024
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
        CCSS 
Access R/W 
Reset 0 
Bit 2322212019181716 
    RCMEAS   MAINFRDY 
Access R/WR/W 
Reset 00 
Bit 15141312111098 
 MAINF[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 MAINF[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bit 24 – CCSS Counter Clock Source Selection

ValueDescription
0

The clock of the MAINF counter is the RC oscillator.
1

The clock of the MAINF counter is the crystal oscillator.

Bit 20 – RCMEAS RC Oscillator Frequency Measure (write-only)

The measure is performed on the main frequency (i.e., not limited to RC oscillator only), but if the Main clock frequency source is the 8 to 24 MHz crystal oscillator, the restart of measuring is not needed because of the well known stability of crystal oscillators.

ValueDescription
0

No effect.
1

Restarts measuring of the frequency of the Main clock source. MAINF will carry the new frequency as soon as a low to high transition occurs on the MAINFRDY flag.

Bit 16 – MAINFRDY Main Clock Frequency Measure Ready

To ensure that a correct value is read on the MAINF field, the MAINFRDY flag must be read at 1, then another read access must be performed on the register to get a stable value on the MAINF field.
ValueDescription
0

MAINF value is not valid or the measured oscillator is disabled or a measure has just been started by means of RCMEAS.
1

The measured oscillator has been enabled previously and MAINF value is available.

Bits 15:0 – MAINF[15:0] Main Clock Frequency

Gives the number of cycles of the clock selected by the bit CCSS within 16 Slow clock periods. To calculate the frequency of the measured clock:

fSELCK = (MAINF × fSLCK) / 16

where frequency is in MHz.