64.7.2 ACC Mode Register
This register can only be written if the WPEN bit is cleared in the ACC Write Protection Mode Register.
| Name: | ACC_MR |
| Offset: | 0x04 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| INV | ACEN | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Access | |||||||||
| Reset |
Bit 12 – INV Invert Comparator Output
| Value | Name | Description |
|---|---|---|
| 0 | DIS |
Analog comparator output is directly processed. |
| 1 | EN |
Analog comparator output is inverted prior to being processed. |
Bit 8 – ACEN Analog Comparator Enable
| Value | Name | Description |
|---|---|---|
| 0 | DIS |
Analog comparator disabled. |
| 1 | EN |
Analog comparator enabled. |