47.8.3.2 Host Mode Flowchart

Figure 47-69. Host Mode

The following figure shows the behavior of Transmit Data Register Empty (TDRE), Receive Data Register (RDRF) and Transmission Register Empty (TXEMPTY) status flags within FLEX_SPI_SR during an 8-bit data transfer in Fixed mode without the DMAC involved.

Figure 47-70. Status Register Flags Behavior