35.1.4 Product Dependencies
The pins used for interfacing the DDR/LPDDR memories are not multiplexed with the PIO lines.
The table below gives the connections to the various memory types.
| Signal Name | DDR2 | DDR3 | DDR3L | LPDDR1 | LPDDR2/LPDDR3 |
|---|---|---|---|---|---|
| DDR_VREF | VDDIODDR/2 | VDDIODDR/2 | VDDIODDR/2 | VDDIODDR/2 | VDDIODDR/2 |
| DDR_CAL | GND via 21KΩ | GND via 22KΩ | GND via 23KΩ | GND via 21KΩ | GND via 24KΩ |
| DDR_CK, DDR_CLKN | CLK, CLKN | CLK, CLKN | CLK, CLKN | CLK, CLKN | CLK, CLKN |
| DDR_CKE | CLKE | CLKE | CLKE | CLKE | CLKE |
| DDR_CS | CS | CS | CS | CS | CS |
| DDR_RESETN | Not connected | DDR_RESETN | DDR_RESETN | Not connected | Not connected |
| DDR_BA[2:0] | BA[2:0] | BA[2:0] | BA[2:0] | BA[1:0] | Not connected |
| DDR_WE | WE | WE | WE | WE | CA2 |
| DDR_RAS, DDR_CAS | RAS, CAS | RAS, CAS | RAS, CAS | RAS, CAS | CA0, CA1 |
| DDR_A[13:0] | A[13:0] | A[13:0] | A[13:0] | A[13:0] | CAx, with x>2 |
| DDR_D[31:0] | D[31:0] | D[31:0] | D[31:0] | D[31:0] | D[31:0] |
| DDR_DQS[3:0], DDR_DQSN[3:0] | LDQS,UDQS, DDR_VREF(1) | DQS[3:0], DQSN[3:0] | DQS[3:0], DQSN[3:0] | DQS[3:0], DDR_VREF | DQS[3:0], DQSN[3:0] |
| DDR_DQM[3:0] | UDM, LDM | DQM[3:0] | DQM[3:0] | DQM[3:0] | DQM[3:0] |
Note:
- DDR_DQSN[3:0] can be connected to DDR_VREF or to DQSN[3:0] of the memory, as specified in the DDR2-SDRAM device datasheet. Bit MPDDRC_CR.NDQS is to be set accordingly.