47.7.8.2 Bit Rate

In SPI mode, the bit rate generator operates in the same way as in USART Synchronous mode. See Baud Rate in Synchronous Mode or SPI Mode. However, some restrictions apply:

In SPI Host mode:

• The external clock SCK must not be selected (USCLKS ≠ 0x3), and the FLEX_US_MR.CLKO bit must be set in order to generate correctly the serial clock on the SCK pin.
• To ensure a correct behavior of the receiver and the transmitter, the value programmed in CD must be ≥ 6.
• If the divided peripheral clock is selected, the value programmed in CD must be even to ensure a 50:50 mark/space ratio on the SCK pin; this value can be odd if the peripheral clock is selected.

In SPI Client mode:

• The external clock (SCK) selection is forced regardless of the value of the FLEX_US_MR.USCLKS field. Likewise, the value written in FLEX_US_BRGR has no effect, because the clock is provided directly by the signal on the USART SCK pin.
• To ensure a correct behavior of the receiver and the transmitter, the external clock (SCK) frequency must be at least six times lower than the system clock frequency.