67.3 DC Characteristics

Table 67-2. Recommended Thermal Operating Conditions
Symbol	Parameter	Conditions	Min	Typ	Max	Unit
T_A	Ambient Temperature	–	-40	–	+105	°C
T_J	Junction Temperature	–	-40	–	+125	°C
R_thJA	Junction-to-ambient thermal resistance	–	–	34.8	–	°C/W
P_D	Allowable Power Dissipation	At T_A = 105°C	–	–	575	mW

Table 67-3. DC Characteristics
Symbol	Parameter	Conditions	Min	Typ	Max	Unit
V_DDCORE	DC Supply Core	Processor clock frequency < 400 MHz	1.1	1.2	1.32	V
	DC Supply Core	Processor clock frequency < 500 MHz	1.2	1.25	1.32	V
	Allowable Voltage Ripple	rms value 10 kHz to 20 MHz	–	–	15	mV
	Slope	–	1.3	–	–	V/ms
V_DDBU	DC Supply I/Os, Backup	Must be established first	1.65		3.6	V
	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	30	mV
	Slope	–	2.4	–	–	V/ms
V_DDANA	DC Supply I/Os, Backup	The ADC is not functional below 2.0V	1.65		3.6	V
	Allowable Voltage Ripple	rms value 10 kHz to 20 MHz	–	–	20	mV
	Slope	–	2.4	–	–	V/ms
V_DDIOP0	DC Supply LCD I/Os		1.65	–	3.6	V
V_DDIOP0	Allowable Voltage Ripple	rms value 10 kHz to 20 MHz	–	–	20	mV
V_DDIOP1	DC Supply Peripheral I/Os	Peripheral I/O Lines	1.65	–	3.6	V
V_DDIOP1	Allowable Voltage Ripple	rms value 10 kHz to 20 MHz	–	–	20	mV
V_DDIOP2	DC Supply Peripheral I/Os	Peripheral I/O Lines	1.65	–	3.6	V
V_DDIOP2	Allowable Voltage Ripple	rms value 10 kHz to 20 MHz	–	–	20	mV
V_DDPLLA	PLL A and Main Oscillator Supply	–	1.1	1.2	1.32	V
	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	20	mV
	Allowable Voltage Ripple	rms value > 10 MHz	–	–	20	mV
V_DDUTMIC	DC Supply UDPHS and UHPHS UTMI+ Core	–	1.1	1.2	1.32	V
V_DDUTMIC	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	20	mV
V_DDUTMII	DC Supply UDPHS and UHPHS UTMI+ Interface	–	3.0	3.3	3.6	V
V_DDUTMII	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	20	mV
V_DDHSIC	DC Supply HSIC Phy	–	1.1	1.2	1.3	V
V_DDHSIC	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	20	mV
V_DDAUDIOPLL	DC Supply AUDIO PLL	–	3.0	3.3	3.6	V
V_DDAUDIOPLL	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	20	mV
V_DDFUSE	DC Supply Fuse Box	For fuse programming only	2.25	2.5	2.75	V
V_DDFUSE	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	20	mV
V_DDSDMMC	DC Supply Peripheral I/Os	SDMMC I/Os Lines	1.65	–	3.6	V
V_DDSDMMC	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	20	mV
V_DDISC	DC Supply Peripheral I/Os	ISC I/Os Lines	1.65	–	3.6	V
V_DDISC	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	20	mV
V_DDOSC	DC Supply Oscillator	–	1.65	–	3.6	V
V_DDOSC	Allowable Voltage Ripple	rms value 10 kHz to 10 MHz	–	–	15	mV
V_DDIODDR	DC Supply SDRAM I/Os	LPDDR1-DDR2 Interface I/O lines	1.7	1.8	1.9	V
		LPDDR2-LPDDR3 Interface I/O lines	1.14	1.2	1.30
		DDR3L Interface I/O lines	1.29	1.35	1.45
		DDR3 Interface I/O lines	1.43	1.5	1.57
V_IL	Low-level Input Voltage^{(1, 3)}	VDDIO in 3.3V range	–	–	0.8	V
V_IL	Low-level Input Voltage^{(1, 3)}	VDDIO in 1.8V range	–	–	0.3 x VDDIO	V
V_IH	High-level Input Voltage^{(1, 3)}	VDDIO in 3.3V range	2	–	–	V
V_IH	High-level Input Voltage^{(1, 3)}	VDDIO in 1.8V range	0.7 x VDDIO	–	–	V
V_OL	Low-level Output Voltage	I_O MAX	–	–	0.41	V
V_OH	High-level Output Voltage	I_O MAX	VDDIO - 0.4	–	–	V
V_hys	Schmitt Trigger Hysteresis⁽³⁾	All PIO lines, VDDIOx in 3.3V range	200	–	–	mV
V_hys	Schmitt Trigger Hysteresis⁽³⁾	All PIO lines, VDDIOx in 1.8V range	150	–	–	mV
I_OL	I_OlL(or I_SINK) (VOL = 0.4V)	All GPIO_x, 1.8V: Low	-1	–	–	mA
		All GPIO_x, 1.8V: Medium⁽³⁾	-10	–	–
		All GPIO_x, 1.8V: High⁽³⁾	-18	–	–
I_OH	I_OH (or I_SOURCE) (VOH = VDDIO - 0.4V)	All GPIO_x, 1.8V: Low	–	–	1	mA
		All GPIO_x, 1.8V: Medium⁽³⁾	–	–	10
		All GPIO_x, 1.8V: High⁽³⁾	–	–	18
I_OL	I_OlL(or I_SINK) (VOL = 0.4V)	All GPIO_x, 3.3V: Low	-2	–	–	mA
		All GPIO_x, 3.3V: Medium⁽³⁾	-20	–	–
		All GPIO_x, 3.3V: High⁽³⁾	-32	–	–
I_OH	I_OH (or I_SOURCE) (VOH = VDDIO - 0.4V)	All GPIO_x, 3.3V: Low	–	–	2	mA
		All GPIO_x, 3.3V: Medium⁽³⁾	–	–	20
		All GPIO_x, 3.3V: High⁽³⁾	–	–	32
I_IH	High-level Input Current⁽²⁾	Pull-down OFF	-1	–	1	µA
I_IH	High-level Input Current⁽²⁾	Pull-down ON	10	–	60	µA
I_IL	Low-level Input Current⁽²⁾	Pull-up OFF	-1	–	1	µA
I_IL	Low-level Input Current⁽²⁾	Pull-up ON	10	–	60	µA
R_PULLUP	Pull-up Resistor⁽³⁾	GPIO_CLK, GPIO_IO, GPIO: 1.8V	80	143	310	kΩ
R_PULLUP	Pull-up Resistor⁽³⁾	GPIO_CLK, GPIO_IO, GPIO: 3.3V	40	66	130	kΩ
R_PULLDOWN	Pull-down Resistor⁽³⁾	GPIO_CLK, GPIO_IO, GPIO: 1.8V	80	161	430	kΩ
R_PULLDOWN	Pull-down Resistor⁽³⁾	GPIO_CLK, GPIO_IO, GPIO: 3.3V	40	77	160	kΩ
R_PULLUP	Pull-up Resistor⁽³⁾	GPIO_AD: 1.8V	280	380	480	kΩ
R_PULLUP	Pull-up Resistor⁽³⁾	GPIO_AD: 3.3V	280	380	480	kΩ
R_PULLDOWN	Pull-down Resistor⁽³⁾	GPIO_AD: 1.8V	280	380	480	kΩ
R_PULLDOWN	Pull-down Resistor⁽³⁾	GPIO_AD: 3.3V	280	380	480	kΩ
R_SERIAL	Serial Resistor⁽³⁾	GPIO	–	30	–	Ω
		GPIO_IO	–	13	–
		GPIO_CLK, GPIO_AD	–	0	–

Note:

Current injection may lead to performance degradation or functional failures.
I_IH and I_IL are only for GPIO pads.
Simulation data.

Table 67-4. Recommended Operating Conditions on Input Pins (see Note 1)
Symbol	Parameter	Conditions	Min	Max	Unit
V_IN	Input line voltage range on inputs^{(2, 3)}	–	-0.3V	V_DD+ 0.3V	V
I_IN	DC current injection on inputs⁽⁴⁾	–	–	±0.2	mA
I_{TOT_INJ}	Total current injection per power rail or per ground rail⁽⁵⁾	–	–	±2	mA

Note:

In this table, VDD refers to the voltage of the associated power rail of the I/O line, as defined in Pinout. For example, for PA2, VDD refers to VDDSDMMC.
Input voltages V_IN≤ 0V or V_IN ≥ VDD lead to negative or positive current injection on inputs.
For analog inputs (PD19..PD31), input voltages V_IN ≥ min(V_DDANA, V_ADVREFP) lead to saturated A/D conversion to 0xFFF.
Current injection on inputs (PD3..PD31) may degrade the analog performance of the corresponding channel (A/D converter or PTC) or the analog performance of other analog channels.
Corresponds to the sum of the positive currents into one power rail and respectively to the sum of the negative currents into one ground rail as defined in Pinout.

Table 67-5. I/O Switching Frequency⁽¹⁾
GPIO Type	Drive	VDD			Unit
GPIO Type	C_Load = 30pF	1.8V	2.5V	3.3V	Unit
GPIO_IO	Low	8	12	15	MHz
	Medium	60	80	90
	High	80	110	110
GPIO_CLK	Low	10	15	18
	Medium	90	100	120
	High	–	–	–
GPIO_AD	Low	10	15	18
	Medium	90	100	120
	High	–	–	–
GPIO	Low	7	10	12
	Medium	40	50	60
	High	50	60	70

Note:

Simulation data.

Table 67-6. R_SERIAL DDRIO
Symbol	Parameter	Conditions	Min	Typ	Max	Unit
R_SERIAL DDRIO (at ±25%)	Serial Resistor⁽¹⁾	DDR2/LPDDR1 (1.8V)	–	40	–	Ω
		DDR3 (1.5V)	–	43	–	Ω
		DDR3L (1.35V)	–	46	–	Ω
		LPDDR2/LPDDR3 (1.2V)	–	49	–	Ω

Note:

Simulation data.

Table 67-7. R_SERIAL SDMMC for GPIO_EMMC Configured as SDMMC and SDMMC_HC2R.VS18EN = 1
Symbol	Parameter	Conditions	1.8V	3.3V	Unit
R_SERIAL SDMMC (at ±25%)	Serial Resistor ⁽¹⁾	SDMMC_HC2R.DRIVERSEL:
		0 – Type B	50	42	Ω
		1 – Type A	33	28	Ω
		2 – Type C	66	56	Ω
		3 – Type D	100	84	Ω

Note:

Simulation data.

Table 67-8. R_SERIAL SDMMC for GPIO_EMMC NOT Configured as SDMMC or SDMMC_HC2R.VS18EN = 0
Symbol	Parameter	Conditions	1.8V	3.3V	Unit
R_SERIAL SDMMC (at ±25%)	Serial Resistor ⁽¹⁾	PIO_CFGR.DRVSTR:
		0 (very low)	100	84	Ω
		1 (low)	66	56	Ω
		2 (medium)	50	42	Ω
		3 (high)	33	28	Ω

Note:

Simulation data.

Table 67-9. QSPI IO Characteristics
Symbol	Parameter	Conditions	Min	Max	Unit
f_MAX	QSCK output frequency⁽²⁾	Load = 30 pF	–	133	MHz
Duty	QSCK output duty cycle⁽²⁾	Load = 30 pF	45	55	%
R_{SERIAL QSPI}	Serial Resistor in 1.8V range⁽²⁾	VDDIO ~ 1.8V QSPICLK_REG.SUP_SEL= 0⁽¹⁾
		PIO_CFGRx.DRVSTR[1:0] = 00	38	105	Ω
		PIO_CFGRx.DRVSTR[1:0] = 01	20	55	Ω
		PIO_CFGRx.DRVSTR[1:0] = 10	12	35	Ω
		PIO_CFGRx.DRVSTR[1:0] = 11	10	26	Ω
	Serial Resistor in 3.3V range⁽²⁾	VDDIO ~ 3.3V QSPICLK_REG.SUP_SEL= 1⁽¹⁾
		PIO_CFGRx.DRVSTR[1:0] = 00	52	120	Ω
		PIO_CFGRx.DRVSTR[1:0] = 01	26	60	Ω
		PIO_CFGRx.DRVSTR[1:0] = 10	17	40	Ω
		PIO_CFGRx.DRVSTR[1:0] = 11	13	30	Ω

Note:

Refer to the section Special Function Registers (SFR).
Simulation data.