67.19.3 LPDDR1-SDRAM

Note: For LPDDR1 memory, the SHIFT_SAMPLING field value in the MPRDDRC_RD_DATA_PATH register must be configured as follows:

SHIFT_SAMPLING = 0 for 0 < DDR_CLK < 94 MHz

SHIFT_SAMPLING = 1 for 94 MHz < DDR_CLK < 166 MHz

Table 67-79. System Clock Waveform Parameters
SymbolParameterConditionsMinMaxUnit
tDDRCKDDRCK Cycle TimeVDDCORE[1.1V, 1.32V]7.5–ns
tDDRCKDDRCK Cycle TimeVDDCORE[1.2V, 1.32V],
VDDIODDR[1.8V, 1.9V]6–ns