33.14 Fast Start-up from Ultra-Low-Power 0 (ULP0) Mode

In Ultra-Low-power 0 (ULP0) mode, the Main clock (MAINCK) must be running, thus either the 12 MHz crystal oscillator or the Fast RC oscillator must be enabled. The lowest power consumption that can be achieved in ULP0 mode, can be obtained when dividing the selected oscillator frequency by 64 by writing PMC_MCKR.PRES to 6. Any interrupt exits the system from ULP0 mode. The software must write PMC_MCKR.PRES to 1 to provide MCK with the fastest clock. If the PLL is used, the start-up procedure must be done prior to writing PMC_MCKR.PRES to 1. The following figure illustrates an example of start-up phase from ULP0 mode without use of PLL.

Warning: The duration of the WKUPx pins active level must be greater than four MAINCK cycles.