40.7.1.3 Transmit Buffer List
Transmit data is read from areas of data (the buffers) in system memory. These buffers are listed in another data structure that also resides in main memory. This data structure (Transmit Buffer Queue) is a sequence of descriptor entries as defined in Transmit Buffer Descriptor Entry.
The Transmit Buffer Queue Pointer register points to this data structure.
To create this list of buffers:
- Allocate a number (N) of buffers of between 1 and 2047 bytes of data to be transmitted in system memory. Up to 128 buffers per frame are allowed.
- Allocate an area 8N bytes for the transmit buffer descriptor list in system memory and create N entries in this list. Mark all entries in this list as owned by GMAC, i.e., bit 31 of word 1 set to 0.
- Add an extra descriptor to the end of queue with its used bit set (bit 31 in word 1 set to 1). This last descriptor in the queue may also have its wrap bit set (bit 1 in word 0 set to 1) in addition to its used bit. When transmit is enabled, at least one entry in the buffer descriptor ring must have its used bit set. When the buffer descriptor ring is initialized for the first time, a used bit must be set before or at the buffer descriptor with the wrap bit. Once transmission halts due to reading a used bit, firmware can reuse the transmit buffers and clear the used bits before, including the one with the wrap bit, then restart transmission by writing TSTART in the Network Control register.
- The GMAC can now read transmit data so fast that all data may be read in before it sets the used bit of the first buffer descriptor in the queue.
- Write address of transmit buffer descriptor list and control information to GMAC register transmit buffer queue pointer.
- The transmit circuits can then be enabled by writing to the Network Control register.Note: The queue pointers must be initialized and point to USED descriptors for all queues including those not intended for use.