3.1 PORT - PMUX[m] Register

Some clarifications have been made to the PMUXO and the PMUXE bit fields of the PMUX[m] register.

Bits 7:4 - PMUXO[3:0] Peripheral Multiplexing for Odd-Numbered Pin

These bits select the peripheral function for odd-numbered pins (2*n + 1) of a PORT group when the corresponding PINCFG[n].PMUXEN bit is ‘1’.

Not all possible values for this selection may be valid. For additional information, refer to the Pinout section.

Bits 3:0 - PMUXE[3:0] Peripheral Multiplexing for Even-Numbered Pin

These bits select the peripheral function for even-numbered pins (2*n) of a PORT group when the corresponding PINCFG[n].PMUXEN bit is ‘1’.

Not all possible values for this selection may be valid. For additional information, refer to the Pinout section.