8.2 Interrupt Vector Mapping
Each of the interrupt vectors is connected to one peripheral instance, as shown in the table below. A peripheral can have one or more interrupt sources. See the ‘Interrupts’ section in the ‘Functional Description’ of the respective peripheral for more details on the available interrupt sources.
When the interrupt condition occurs, an Interrupt Flag is set in the Interrupt Flags register of the peripheral (peripheral.INTFLAGS).
An interrupt is enabled or disabled by writing to the corresponding Interrupt Enable bit in the peripheral's Interrupt Control (peripheral.INTCTRL) register.
An interrupt request is generated when the corresponding interrupt is enabled, and the Interrupt Flag is set. The interrupt request remains active until the Interrupt Flag is cleared. See the peripheral's INTFLAGS register for details on how to clear Interrupt Flags.
Vector |
Program |
Peripheral | Description |
28- |
32- |
48- |
---|---|---|---|---|---|---|
0 | 0x00 | RESET | X | X | X | |
1 | 0x02 | CRCSCAN_NMI | Non-Maskable Interrupt available for CRCSCAN | X | X | X |
2 | 0x04 | BOD_VLM | Voltage Level Monitor interrupt | X | X | X |
3 | 0x06 | RTC_CNT | Real Time Counter - Overflow or compare match interrupt | X | X | X |
4 | 0x08 | RTC_PIT | Real Time Counter - Periodic Interrupt Timer interrupt | X | X | X |
5 | 0x0A | CCL_CCL | Configurable Custom Logic interrupt | X | X | X |
6 | 0x0C | PORTA_PORT | Port A - External interrupt | X | X | X |
7 | 0x0E |
TCA0_OVF |
Normal: Timer/Counter Type A Overflow interrupt | X | X | X |
8 | 0x10 | TCA0_HUNF | Split: Timer/Counter Type A High Underflow interrupt | X | X | X |
9 | 0x12 |
TCA0_CMP0 |
Normal: Timer/Counter Type A Compare Channel 0 interrupt | X | X | X |
10 | 0x14 |
TCA0_CMP1 |
Normal: Timer/Counter Type A Compare Channel 1 interrupt | X | X | X |
11 | 0x16 |
TCA0_CMP2 |
Normal: Timer/Counter Type A Compare Channel 2 interrupt | X | X | X |
12 | 0x18 | TCB0_INT | Timer/Counter Type B Capture interrupt | X | X | X |
13 | 0x1A | TCB1_INT | Timer/Counter Type B Capture interrupt | X | X | X |
14 | 0x1C | TWI0_TWIS | Two Wire Interface - Client interrupt | X | X | X |
15 | 0x1E | TWI0_TWIM | Two Wire Interface - Host interrupt | X | X | X |
16 | 0x20 | SPI0_INT | Serial Peripheral Interface interrupt | X | X | X |
17 | 0x22 | USART0_RCX | Universal Synchronous Asynchronous Receiver Transmitter - Receive Complete interrupt | X | X | X |
18 | 0x24 | USART0_DRE | Universal Synchronous Asynchronous Receiver Transmitter - Data Register Empty interrupt | X | X | X |
19 | 0x26 | USART0_TCX | Universal Synchronous Asynchronous Receiver Transmitter - Transmit Complete interrupt | X | X | X |
20 | 0x28 | PORTD_PORT | Port D - External interrupt | X | X | X |
21 | 0x2A | AC0_AC | Analog Comparator - Compare interrupt | X | X | X |
22 | 0x2C | ADC0_RESRDY | Analog-to-Digital Converter - Result Ready interrupt | X | X | X |
23 | 0x2E | ADC0_WCOMP | Analog-to-Digital Converter - Window Compare interrupt | X | X | X |
24 | 0x30 | PORTC_PORT | Port C - External interrupt | X | X | X |
25 | 0x32 | TCB2_INT | Timer/Counter Type B Capture interrupt | X | X | X |
26 | 0x34 | USART1_RCX | Universal Synchronous Asynchronous Receiver Transmitter - Receive Complete interrupt | X | X | X |
27 | 0x36 | USART1_DRE | Universal Synchronous Asynchronous Receiver Transmitter - Data Register Empty interrupt | X | X | X |
28 | 0x38 | USART1_TCX | Universal Synchronous Asynchronous Receiver Transmitter - Transmit Complete interrupt | X | X | X |
29 | 0x3A | PORTF_PORT | Port F - External interrupt | X | X | X |
30 | 0x3C | NVMCTRL_EE | Non-Volatile Memory Controller - Ready interrupt | X | X | X |
31 | 0x3E | USART2_RCX | Universal Synchronous Asynchronous Receiver Transmitter - Receive Complete interrupt | X | X | X |
32 | 0x40 | USART2_DRE | Universal Synchronous Asynchronous Receiver Transmitter - Data Register Empty interrupt | X | X | X |
33 | 0x42 | USART2_TCX | Universal Synchronous Asynchronous Receiver Transmitter - Transmit Complete interrupt | X | X | X |
34 | 0x44 | PORTB | Port B - External interrupt | X | ||
35 | 0x46 | PORTE | Port E - External interrupt | X | ||
36 | 0x48 | TCB3_INT | Timer/Counter Type B Capture interrupt | X | ||
37 | 0x4A | USART3_RCX | Universal Synchronous Asynchronous Receiver Transmitter - Receive Complete interrupt | X | ||
38 | 0x4C | USART3_DRE | Universal Synchronous Asynchronous Receiver Transmitter - Data Register Empty interrupt | X | ||
39 | 0x4E | USART3_TCX | Universal Synchronous Asynchronous Receiver Transmitter - Transmit Complete interrupt | X |