31.5.2 MUX Control
| Name: | MUXCTRL |
| Offset: | 0x02 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| INVERT | INITVAL | MUXPOS[2:0] | MUXNEG[2:0] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – INVERT Invert AC Output
This bit controls whether the AC output is inverted.
When enabled, the inversion must be taken into account when using the AC output signal as an input to other peripherals or parts of the system.
| Value | Description |
|---|---|
| 0 | The OUT signal is not inverted |
| 1 | The OUT signal is inverted |
Bit 6 – INITVAL AC Output Initial Value
This bit controls the initial value of the comparator output.
This initial value prevents the AC output from toggling before the comparator is ready.
| Value | Name | Description |
|---|---|---|
| 0 | LOW | The OUT
signal is initialized to ‘0’ |
| 1 | HIGH | The OUT
signal is initialized to ‘1’ |
Bits 5:3 – MUXPOS[2:0] Positive Input MUX Selection
| Value | Name | Description |
|---|---|---|
0x0
| AINP0 | Positive pin 0 |
0x1
| - | Reserved |
0x2
| - | Reserved |
0x3
| AINP3 | Positive pin 3 |
0x4
| AINP4 | Positive pin 4 |
Other
| - | Reserved |
Bits 2:0 – MUXNEG[2:0] Negative Input MUX Selection
| Value | Name | Description |
|---|---|---|
0x0
| AINN0 | Negative pin 0 |
0x1
| AINN1 | Negative pin 1 |
0x2
| AINN2 | Negative pin 2 |
0x3
| - | Reserved |
0x4
| DACREF | DAC reference |
Other
| - | Reserved |