| Document | - General improvements of the documentation and its structure
- Status: Complete Data Sheet
- The USART0 offset
has been corrected
- Removed the
EXTBREAK
|
| CPU |
- Updated the CPU’s Stack Pointer Register
description
|
| Memories |
- Added the USERROW Register
|
| Peripherals and Architecture | The following tables have been updated to show only 28-Pin and
32-Pin:- Peripheral Address Map
- System Memory Address Map
|
| NVMCTRL | - Updated the description of Section Sizes in the Logical Sections section
- Note has been added to the Command
Modes section in the Function Description
section
- Updated the Available Interrupt Vectors and Sources table
- Notes have been added to the flags of the INTLAGS register
|
| CLKCTRL | - The Signal Description has been updated
- Improved the description of the Sleep mode operation
|
| EVSYS | - Removed the Event Users table
|
| PORT-I/O | - Improved the descriptions of the following sections:
- Initialization
- The Pin descriptions
- The Interrupts
- Available Interrupt Vectors and Sources
- Updated the Available Interrupt Vectors and Sources table
- Updated the Event’s name in the Event Generators in PORTx table
- Removed all the INLVL bits in PORTx registers
|
| BOD | - Improved the bit description and removed the sentence
- Improved the Initialization description
- Updated the CTRLA register reset value to
0xXX
|
| VREF | - Improved the Initialization description
|
| TCA | - Updated the Interrupt tables:
- Available
Interrupt Vectors and Sources in Single and Split
Modes
- Improved the description for setting or changing interrupt settings
- Updated the bit field values for the Waveform Generation Mode WGMODE bit field in the CTRLB register
|
| TCB | - Improved the description of the Output
Configuration
|
| USART | - The Host SPI is updated to SPI Host
- The LIN Client is updated to LIN Responder
- Added the description of the Transmit Pipeline section
- Note is removed from the Receiver Error Flags section
- Improved the description of Flushing the Receive Buffer
- Updated the following figures in the Functional Description section:
- Frame Formats
- Auto-Baud Timing
- XDIR Drive Timing
- Protected Identifier Field and Mapping of Identifier and Parity Bits
- Updated the Available Interrupt Vectors and Sources table
- Updated Registers:
- BAUD: The Reset value is 0x0000
- DBGCTRL: added the description of the DBGRUN bit
|
| USB | - Updated the Event Generators in USB table
- Improved the description of the Interrupts section
- Updated the Available Interrupt Vectors and Sources table
- Updated the following tables in the Interrupts section:
- Transaction Complete Interrupt Sources
- Bus Event Interrupt Sources
|
| AC | - Updated the Block Diagram
- Updated the Signal Description table
- Updated the Functional Description:
- Improved the description of the initialization during the start-up time. The INITVAL bit in ACn.MUXCTRL register is used.
- The Input and Reference Selection: Added a second formula to calculate VDACREF
- Updated the Analog Comparators in the Window Mode figure
- Updated the Interrupts:
- Available Interrupt Vectors and Sources tables
- Configurations for Available Interrupt Vectors and Sources table
- Updated registers:
- Updated the description of the bits and bit fields in the registers
- Added the DACREFL register
|
| ADC | - The Main Clock Time base control register is
CLKCTRL.MCLKTIMEBASE
- Improved the accumulator test description
- Improved the temperature sensor usage description
- Improved the Interrupt section
- The register offsets corrected to agree with the header files
- MUXPOS register corrections
|
| UPDI | - Corrected the start address in the Memory Map, As Seen From The UPDI figure
|
| Electrical Characteristics | - Updated the final limits
- Updated IDD_ADC in Peripherals Power Consumption
- Updated the Supply Voltage table
- Added
Input Leakage on the Regulator Output
(VUSB Pin)
- Added
Sink Function Trigger Point
- Characteristic graphs added
|
| Microchip Information | Updated |
