41.1 Rev. D - 12/2023

Section Changes
Document
  • General improvement of the documentation and its structure
Features
  • Updated the flash endurance cycles from 10,000 to 1,000
Device
  • Added the end address to the Physical Properties of SRAM Memory table
CPU
  • General improvements on documentation
NVMCTRL
  • General improvements on documentation
CLKCTRL
  • General improvements on documentation
SLPCTRL
  • Improved the Sleep modes section
RSTCTRL
  • Added the Block Diagram figure
  • Improved the Power-on Reset section
  • Improved the Watchdog Timer (WDT) Reset section
  • Added description to the UPDIRF bit of RSTFR register
CPUINT
  • Updated the Initialization section
  • Updated the description of IVSEL bit of CTRLA register
EVSYS
  • Updated the Example of Event Source, Generator, User, and Action figure
PORT
  • General improvements on documentation
BOD
  • Updated the description of SAMPFREQ bit of CTRLA register
  • Updated the note on CTRLB register
WDT
  • Improved Window Mode section
  • Updated the description of STATUS register
TCA
  • Improved the Overview section
  • Updated Period and Compare Double Buffering figure
  • Added clarification note to the Waveform Generation section
  • Improved Split Mode Overview section
  • Updates and improvements on the following bits and registers:
    • CMPEN bit of CTRLB register
    • CMD and CMDEN bit fields of CTRLECLR register
TCB
  • General improvement of the documentation
TCD
  • Improved the Programmable Output Events section
  • Added Programmable Output Event Timing figure
  • Updated te description to the following bits and registers:
    • ACTION bit of EVCTRLA register
    • ACTION bit of EVCTRLB register
    • FAULTCTRL register
    • DLYSEL bit of DLYCTRL register
RTC
  • Moved the descriptions from the following bits or registers to notes in the footer of the same registers:
  • PRESCALER bit of CTRLA
  • CNT register
  • PER register
  • CMP register
  • PITCTRLA register
USART
  • Updated the description of WFB bit of STATUS register
  • Updated the description of IREI bit of EVCTRL register
SPI
  • Updated the description of IF bit of INTFLAGS register
TWI
  • General improvements on documentation
  • Updated the description of SDASETUP bit of CTRLA register
  • Updated the description of TIMEOUT bit of MCTRLA register
  • Updated the description of RIF bit of MSTATUS register
CCL
  • General improvements on documentation
AC
  • General improvements on documentation
ADC
  • Updated the Features section
  • Updated the Conversion Result (Output Formats) section
  • Improved the description of MUXPOS register
DAC
  • Added details to DAC Output Voltage section
  • Updated the Unbuffered Output as Source For Internal Peripherals section
  • Added a note to Buffered Output section
  • Updated the description of DATA register
ZCD
  • General improvements on documentation
UPDI
  • Added details to Addressing the Program Memory Space section
  • Added Memory Map, As Seen From The UPDI figure
  • Updated the information in the Recommended UART Baud Rate Based on UPDICLKSEL Setting table
  • Updated the UPDI Instruction Set Overview figure
  • Updated the Chip Erase section
Electrical characteristics
  • Updated the following tables:
    • Peripherals Power Consumption
    • Memory Programming Specifications
    • Thermal Specifications
    • Internal Oscillators
    • 32.768 kHz Crystal Oscillator (XOSC32K) Specifications
    • System Clock
    • USART in SPI Host Mode - Timing Specifications
    • SPI - Timing Specifications in Host Mode
    • SPI - Timing Specifications in Client Mode
    • TWI - Timing Specifications
    • DAC Electrical Specifications
    • ADC Accuracy Specifications
    • Analog Comparator Specifications
    • Zero-Cross Detector Specifications
  • Updated all char graphs in Power-Down Sleep Mode section
  • Removed BOD Response Time vs. Temperature char graph
Package Marking Information
  • Added naming example figures to all pin packages