4.4 I/O Transmission to the SHA104-TFLXAUTH
The transmission of data from the system to the SHA104-TFLXAUTH is summarized in the table below. This transmission sequence is valid for both the I2C and SWI. The order of transmission is as follows:
- Start condition
- Device Address byte
- Word Address byte
- Optional Data bytes (1 through N)
- Stop condition
| Name | I/O Name | Description |
|---|---|---|
| Device Address | Device Address | This byte selects a particular device on the I/O interface. SHA104-TFLXAUTH is selected if bits 1 through 7 of this byte match bits 1 through 7 of the Device_Address byte in the Configuration zone. Bit 0 of this byte is the R/W bit and must be zero to indicate a write operation (the bytes following the device address travel from the host to the client). |
| Word Address | Word Address | This byte must have a value of
0x03 for normal operation. See
4.4.1 Word Address Values
for more information. |
| Command | Data 1, N | The command group, consisting of the count, command packet and the 2-byte CRC. The CRC is calculated over the size and packet bytes. |
- The SHA104-TFLXAUTH does not support the same client addressing scheme as Microchip AT21CS11.
- Data is transferred MSb first. Numbers in diagram represent bit location, not bit number in the byte.
Because the device treats the command input buffer as a FIFO, the input group can be sent to the device in one or many I/O command groups. The first byte sent to the device is the count, so after the device receives that number of bytes, it will ignore any subsequently received bytes until execution is finished.
The system must send a Stop condition after the last command byte to ensure that the SHA104-TFLXAUTH will start the computation of the command. Failure to send a Stop condition may eventually result in a loss of synchronization.