12.5.6 Main Clock Status
Name: | MCLKSTATUS |
Offset: | 0x05 |
Reset: | 0x00 |
Property: | - |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PLLS | EXTS | XOSC32KS | OSC32KS | OSCHFS | SOSC | ||||
Access | R | R | R | R | R | R | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 5 – PLLS PLL Status
Value | Description |
---|---|
0 | PLL is not running |
1 | PLL is running |
Bit 4 – EXTS External Crystal/Clock Status
Value | Description |
---|---|
0 |
The external high-frequency crystal is not stable when the Source Select (SELHF) bit in the External High-Frequency Oscillator Control A (CLKCTRL.XOSCHFCTRLA) register is ‘ |
1 |
The external high-frequency crystal is stable when the SELHF bit is ‘ |
Bit 3 – XOSC32KS XOSC32K Status
Value | Description |
---|---|
0 |
The external 32.768 kHz crystal is not stable when the Source Select (SEL) bit in the 32.768 Crystal Oscillator Control A (CLKCTRL.XOSC32K) register is ‘ |
1 |
The external 32.768 kHz crystal is stable when the SEL bit is ‘ |
Bit 2 – OSC32KS OSC32K Status
Value | Description |
---|---|
0 | OSC32K is not stable |
1 | OSC32K is stable |
Bit 1 – OSCHFS Internal High-Frequency Oscillator Status
Value | Description |
---|---|
0 | OSCHF is not stable |
1 | OSCHF is stable |
Bit 0 – SOSC Main Clock Oscillator Changing
Value | Description |
---|---|
0 | The clock source for CLK_MAIN is not undergoing a switch |
1 | The clock source for CLK_MAIN is undergoing a switch and will change as soon as the new source is stable |