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12
CLKCTRL - Clock Controller
12.3
Functional Description
Introduction
AVR® DD
Family Overview
Features
1
Block Diagram
2
Pinout
3
I/O Multiplexing and Considerations
4
Hardware Guidelines
5
Power Supply
6
Conventions
7
AVR® CPU
8
Memories
9
Peripherals and Architecture
10
GPR - General Purpose Registers
11
NVMCTRL - Nonvolatile Memory Controller
12
CLKCTRL - Clock Controller
12.1
Features
12.2
Overview
12.3
Functional Description
12.3.1
Initialization
12.3.2
Main Clock Selection and Prescaler
12.3.3
Main Clock After Reset
12.3.4
Clock Sources
12.3.5
Phase-Locked Loop (PLL)
12.3.6
Manual Tuning and Auto-Tune
12.3.7
Clock Failure Detection (CFD)
12.3.8
Sleep Mode Operation
12.3.9
Configuration Change Protection (CCP)
12.4
Register Summary
12.5
Register Description
13
SLPCTRL - Sleep Controller
14
RSTCTRL - Reset Controller
15
CPUINT - CPU Interrupt Controller
16
EVSYS - Event System
17
PORTMUX - Port Multiplexer
18
PORT - I/O Pin Configuration
19
MVIO - Multi-Voltage I/O
20
BOD - Brown-out Detector
21
VREF - Voltage Reference
22
WDT - Watchdog Timer
23
TCA - 16-bit Timer/Counter Type A
24
TCB - 16-Bit Timer/Counter Type B
25
TCD - 12-Bit Timer/Counter Type D
26
RTC - Real-Time Counter
27
USART - Universal Synchronous and Asynchronous Receiver and Transmitter
28
SPI - Serial Peripheral Interface
29
TWI - Two-Wire Interface
30
CRCSCAN - Cyclic Redundancy Check Memory Scan
31
CCL - Configurable Custom Logic
32
AC - Analog Comparator
33
ADC - Analog-to-Digital Converter
34
DAC - Digital-to-Analog Converter
35
ZCD - Zero-Cross Detector
36
UPDI - Unified Program and Debug Interface
37
Instruction Set Summary
38
Electrical Characteristics
39
Characteristics Graphs
40
Ordering Information
41
Package Drawings
42
Data Sheet Revision History
Microchip Information
12.3 Functional Description
