3.37.5 Direct Memory Access Controller (DMAC)

The DMA Controller (DMAC) can transfer data between memories and peripherals, and thus off-load these tasks from the CPU. It enables high data transfer rates with minimum CPU intervention, and frees up CPU time. With access to all peripherals, the DMAC can handle automatic transfer of data between communication modules. DMAC has several DMA channels and each channel is fully programmable and provides both peripheral or memory-to-memory transfers.

The DMA Controller can also be used to generate CRC on the data been transferred through the channel or an I/O interface.

Using The Library

DMA controller requires source address, destination address and transfer count to initiate transfer. It transfers data on each DMA trigger and decrements the transfer count. The DMA generates completion interrupt to notify CPU at the end of the DMA transfer.

User can use either callback mechanism or polling mechanism to determine DMA completion.

  • With polling, the application will need to continuously poll to check if the DMA has completed the transfer.

  • With callback, the registered callback function will be called when the transfer is completed. This means the application do not have to poll continuously.

Callback method

This example demonstrates DMA transfer with callback

#define USART1_TRANSMIT_ADDRESS     (&SERCOM4_REGS->USART.DATA)

uint8_t txBuffer[] = "Hello World!";

void DMAC_Callback(DMAC_TRANSFER_EVENT status, uintptr_t context)
{
      if(status == DMAC_TRANSFER_EVENT_COMPLETE)
      {
           // Transfer is completed.
      }
}

 int main ( void )
{
      SYS_Initialize ( NULL );

      DMAC_ChannelCallbackRegister(DMAC_CHANNEL_0, DMAC_Callback, 0);

      DMAC_ChannelTransfer(DMAC_CHANNEL_0, txBuffer, (const void *)USART1_TRANSMIT_ADDRESS, sizeof(txBuffer));

}

Polling method

This example demonstrates DMA transfer with polling

#define USART1_TRANSMIT_ADDRESS     (&SERCOM4_REGS->USART.DATA)

uint8_t txBuffer[] = "Hello World!";

int main ( void )
{
      SYS_Initialize ( NULL );

      DMAC_ChannelTransfer(DMAC_CHANNEL_0, txBuffer, (const void *)USART1_TRANSMIT_ADDRESS, sizeof(txBuffer));

      while(DMAC_ChannelIsBusy(DMAC_CHANNEL_0));
}

Library Interface

Direct Memory Access Controller peripheral library provides the following interfaces:

Functions

NameDescription
DMAC_InitializeInitializes the DMAC controller of the device
DMAC_ChannelCallbackRegisterThis function allows a DMAC PLIB client to set an event handler
DMAC_ChannelTransferSchedules a DMA transfer on the specified DMA channel
DMAC_ChannelIsBusyThe function returns the busy status of the channel
DMAC_ChannelTransferStatusGetReturns the DMA channel's transfer status
DMAC_ChannelDisableThe function disables the specified DMAC channel
DMAC_ChannelGetTransferredCountReturns transfer count of the ongoing DMAC transfer
DMAC_ChannelSuspendThis function Suspends the DMA channel
DMAC_ChannelResumeThis function Resumes the DMA channel
DMAC_LinkedListDescriptorSetupSets up linked list descriptor
DMAC_ChannelLinkedListTransferThe function submit a list of DMA transfers
DMAC_ChannelSettingsGetReturns the current channel settings for the specified DMAC Channel
DMAC_ChannelSettingsSetChanges the current transfer settings of the specified DMAC channel
DMAC_ChannelCRCSetupDMA Channel CRC setup and enable function
DMAC_CRCReadDMA CRC read function
DMAC_CRCCalculateFunction to calculate CRC using I/O Interface
DMAC_CRCDisableDMA CRC disable function

Data types and constants

NameTypeDescription
DMAC_CHANNELEnumLists the set of channels available for data transfer using DMAC
DMAC_TRANSFER_EVENTEnumEnumeration of possible DMAC transfer events
DMAC_CRC_POLYNOMIAL_TYPEEnumEnumeration of Supported CRC polynomials
DMAC_CRC_BEAT_SIZEEnumEnumeration of Supported CRC Beat Size
DMAC_CRC_SETUPStructFundamental data object that represents DMA CRC setup parameters
DMAC_CHANNEL_CALLBACKTypedefPointer to a DMAC Transfer Event handler function
DMAC_CHANNEL_CONFIGTypedefDMAC Block Transfer Control configuration value