32.5.1 Control A


Bit	7	6	5	4	3	2	1	0
	RUNSTDBY	OUTEN	OUTRANGE[1:0]					ENABLE
Access	R/W	R/W	R/W	R/W				R/W
Reset	0	0	0	0				0

Bit 7 – RUNSTDBY Run in Standby Mode

If this bit is ‘1’, the DAC or the output buffer will not automatically be disabled when the device is entering Standby sleep mode.

Bit 6 – OUTEN Output Buffer Enable

Writing a ‘1’ to this bit enables the output buffer and sends the OUT signal to a pin.

Bits 5:4 – OUTRANGE[1:0] Output Buffer Range

This bit field controls the range of the output buffer. The output buffer range can be optimized for low values of the DACn.DATA register (LOW), high DATA values (HIGH), or toggle between those two settings (FULL). The toggling is triggered by the MSb of the DATA register. Refer to the Electrical Characteristics section for information about the drive capabilities of the DAC output buffer for the different bit field values.

Value	Name	Description
0x0	FULL	Full output buffer range
0x1	-	-
0x2	LOW	Low output buffer range
0x3	HIGH	High output buffer range

Bit 0 – ENABLE DAC Enable

Writing a ‘1’ to this bit enables the DAC.

Name:	CTRLA
Offset:	0x00
Reset:	0x00
Property:	-