2.1.2.1 DIAG_CLK_Frequency()

diag_result_t DIAG_CLK_Frequency (uint32_t sysclock, uint8_t linefreq, uint8_t tolerance)

Implements independent time-slot monitoring to verify the reliability of the system clock (i.e., the system clock should neither be too fast nor too slow). This test uses the AC line frequency to verify proper CPU clock operation. The AC line frequency is measured by using a Zero-Cross Detection (ZCD) circuit that is connected to the input of the Timer1 Gate module.

Parameters:
in sysclock

- CPU system clock frequency value

in linefreq

- Reference line frequency value

in tolerance

- Limit for deviation frequency value

Returns:

DIAG_PASS - Success  

DIAG_FAIL - Failure  

DIAG_INVALID_ARG - Invalid  

DIAG_UNDEFINED - Undefined