27.3.3.5 10-bit Address

Regardless of whether the transaction is a read or write, the master must start by sending the 10-bit address with the R/W direction bit set to ‘0’.

The slave address match logic supports recognition of 7-bit addresses and general call address. The Slave Address (TWIn.SADDR) register is used by the slave address match logic to determine if a master device has addressed the TWI slave.

The TWI slave address match logic only supports recognition of the first byte of a 10-bit address and the second byte must be handled in software. The first byte of the 10-bit address will be recognized if the upper five bits of the Slave Address (TWIn.SADDR) register are 0b11110. Thus, the first byte will consist of five indication bits, the two Most Significant bits (MSb) of the 10-bits address and the R/W direction bit. The Least Significant Byte (LSB) of the address that follows from the master will come in the form of a data packet.