2.2 PIC18 CPU (System Arbitration)
The following note has been added after the existing text of Section 7.1 System Arbitration, to clarify the interaction of the System Arbiter, the PRLOCKED bit and system interrupts.
Important: When the PRLOCKED bit is set, the Non
Volatile Memory (NVM) module has a fixed priority of
0 that
cannot be changed. If an interrupt is desired when an NVM read/write operation
is in progress, then the ISR priority level must be set to 0.
The NVM module priority is ignored when PRLOCKED bit is cleared.