2 Pin Descriptions
The descriptions of the pins are listed in Table 2-1.
Name | 8‑Lead SOIC | Function |
---|---|---|
NC | 1 | No Connect |
NC | 2 | No Connect |
NC | 3 | No Connect |
GND | 4 | Ground |
SDA | 5 | Serial Data |
SCL | 6 | Serial Clock |
WP(1) | 7 | Write-Protect |
VCC | 8 | Device Power Supply |
Note:
- If the WP pin is not driven, it is internally pulled down to GND. In order to operate in a wide variety of application environments, the pull‑down mechanism is intentionally designed to be somewhat strong. Once this pin is biased above the CMOS input buffer’s trip point (~0.5 x VCC), the pull‑down mechanism disengages. Microchip recommends connecting these pins to a known state whenever possible.