2 Pin Descriptions

The descriptions of the pins are listed in Table 2-1.

Table 2-1. Pin Function Table
Name8‑Lead SOICFunction
NC1No Connect
NC2No Connect
NC3No Connect
GND4Ground
SDA5Serial Data
SCL6Serial Clock
WP(1)7Write-Protect
VCC8Device Power Supply
Note:  
  1. If the WP pin is not driven, it is internally pulled down to GND. In order to operate in a wide variety of application environments, the pull‑down mechanism is intentionally designed to be somewhat strong. Once this pin is biased above the CMOS input buffer’s trip point (~0.5 x VCC), the pull‑down mechanism disengages. Microchip recommends connecting these pins to a known state whenever possible.