1.8 Interrupt Handling
The PIC24/dsPIC33 interrupt controller is a generic interrupt controller. Upon detection of an interrupt event, the program counter will branch or vector to a specific address listed in the Interrupt Vector Table. The relationship between the interrupt source and the address to branch to is controlled by the Interrupt Vector Table (IVT) located at address 0 of the program memory. The first two addresses in this table are for device reset and contain a GOTO instruction as well as the address to go to on device reset. The next several table entries contain just the addresses to vector to for different traps on the device like invalid address or oscillator fail events. Starting at address 0x0014, are the 24-bit peripheral interrupt vectors for each peripheral. Just like the traps, these contain just the address of the code where the interrupt should jump too. When a peripheral signals an interrupt to the interrupt controller and if that interrupt is not masked, the CPU will vector to the address contained in this table for the interrupt.
It is important to note the impact of having the interrupt vector table located in the first page of flash. Since these devices have the interrupt vectors located within the first page of flash, the values for the tables must be known at flash programming time of the bootloader. This is not a problem for the bootloader interrupts. All items in the bootloader are known at build time. It knows what the code will be, how big it is, what interrupts are being used, where the Interrupt Service Routines (ISRs) for each peripheral the bootloader uses are located, all of this can be programmed at bootloader program time in the factory. However, what about the application interrupts? The location of each ISR in the application is not known when the bootloader is programmed at the factory. Updating this page of flash in the bootloader in the field can be a very dangerous and difficult operation. Since the interrupt table for many of these devices is located on the same page as the reset vector, trying to reprogram the interrupt vector table can lead to the device being put in a non-recoverable state if a power failure occurs while this page is erased. This is not a recommended approach.
The solution to this problem depends on the type interrupt controller on the device. The PIC24/dsPIC33 devices have a few different interrupt controller options that change how this problem is best solved. Some devices have a second interrupt table called an Alternate Interrupt Vector Table (AIVT). Some devices have this AIVT always at a fixed location. Other devices have this AIVT only in certain modes. Some devices don't have an AIVT at all and must use just the IVT. Refer to your device datasheet to determine what sub-section applies to the device you will be using.
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Devices with only one Interrupt Vector Table (no AIVT). This includes most dsPIC33 devices when CodeGuard(tm) is disabled. This solution is discussed in the Interrupt Handling Section.
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Device with a relocatable Alternate Interrupt Vector table. This includes most dsPIC33 devices when CodeGuard(tm) is enabled. This solution is discussed in the Relocatable Alternate Interrupt Table Devices Section.
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Devices with a fixed Alternate Interrupt Vector Table. This includes many of the PIC24F devices. This solution is discussed in the Fixed Location Alternate Interrupt Vector Table Devices Section.