2.3.1 ADC Functionality Cannot be Ensured with CLK_ADC Above 1.5 MHz and a Setting of 25% Duty Cycle

The ADC functionality cannot be ensured if CLK_ADC > 1.5 MHz with ADCn.CALIB.DUTYCYC set to ‘1’.

Work Around

If ADC is operated with CLK_ADC > 1.5 MHz, ADCn.CALIB.DUTYCYC must be set to ‘0’ (50% duty cycle).

Affected Silicon Revisions


Rev. C
X

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2.3.1 ADC Functionality Cannot be Ensured with CLKADC Above 1.5 MHz and a Setting of 25% Duty Cycle

Work Around

Affected Silicon Revisions

2.3.1 ADC Functionality Cannot be Ensured with CLK_ADC Above 1.5 MHz and a Setting of 25% Duty Cycle