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SAMA5D2 System in Package (SiP) Silicon Errata and Data Sheet Clarifications SAMA5D2 SIP Family Silicon Errata and Data Sheet Clarifications
SAMA5D2 System in Package (SiP) Silicon Errata and Data Sheet Clarifications SAMA5D2 SIP Family Silicon Errata and Data Sheet Clarifications
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ATSAMA5D27C-D1G ATSAMA5D27C-D5M ATSAMA5D27C-LD1G ATSAMA5D27C-LD2G ATSAMA5D28C-D1G ATSAMA5D28C-LD1G ATSAMA5D28C-LD2G
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  2. 19 Revision History
  3. 19.5 Rev. C - 02/2020

SAMA5D2 SIP Family Silicon Errata and Data Sheet Clarifications

  • SAMA5D2 System in Package (SIP)
  • 1 Silicon Issue Summary
  • 2 Power Supply
  • 3 Flexible Serial Communication Controller (FLEXCOM)
  • 4 Ethernet MAC (GMAC)
  • 5 Inter-IC Sound Controller (I2SC)
  • 6 Controller Area Network (MCAN)
  • 7 Peripheral Touch Controller (PTC)
  • 8 Power Management Controller (PMC)
  • 9 Pulse Width Modulation Controller (PWM)
  • 10 Quad Serial Peripheral Interface (QSPI)
  • 11 Real-Time Clock (RTC)
  • 12 ROM Code
  • 13 Secure Digital MultiMedia Card Controller (SDMMC)
  • 14 Secure Fuse Controller (SFC)
  • 15 Synchronous Serial Controller (SSC)
  • 16 Two-wire Interface (TWIHS)
  • 17 Watchdog Timer (WDT)
  • 18 Data Sheet Clarifications
  • 19 Revision History
    • 19.1 Rev. G - 08/2022
    • 19.2 Rev. F - 03/2022
    • 19.3 Rev. E - 09/2021
    • 19.4 Rev. D - 03/2021
    • 19.5 Rev. C - 02/2020
    • 19.6 Rev. B - 01/2020
    • 19.7 Rev. A - 04/2019
  • Microchip Information

19.5 Rev. C - 02/2020

Added in Real-Time Clock (RTC):

- RTC_SR.TDERR flag is stuck at 0

- Read access truncated to the first 24 bits for register RTC_TIMALR (UTC_MODE) .

Updated in ROM Code:

UART blocks USB connection to SAM-BA Monitor

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