29.6.1 Control A

Important: For PIC32CM LS00/LS60 Non-Secure accesses, write accesses (W*) are allowed only if Non-Secure Write is set in the NONSEC register.

Name:	CTRLA
Offset:	0x00
Reset:	0x0000
Property:	PAC Write-Protection, Write-Mix-Secure


Bit	15	14	13	12	11	10	9	8
	CMDEX[7:0]
Access	W/W*/W	W/W*/W	W/W*/W	W/W*/W	W/W*/W	W/W*/W	W/W*/W	W/W*/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
		CMD[6:0]
Access		W/W/W	W/W/W	W/W/W	W/W/W	W/W/W	W/W/W	W/W/W
Reset		0	0	0	0	0	0	0

Bits 15:8 – CMDEX[7:0] Command Execution

When this bit group is written to the key value 0xA5, the command written to CMD will be executed. If a value different from the key value is tried, the write will not be performed and the key error interrupt (INTFLAG.KEYE) will be set. PROGE is set if a previously written command is not completed yet or in case of bad conditions.

The key value must be written at the same time as CMD. If a command is issued through the APB bus on the same cycle as an AHB bus access, the AHB bus access will be given priority. The command will then be executed when the NVM block and the AHB bus are idle.

STATUS.READY must be '1' when the command has issued.

Note: The NVM Address bit field in the Address register (ADDR.ADDR) is driving the hardware (8-bit) address to the NVM when a command is executed using CMDEX.

Bits 6:0 – CMD[6:0] Command

These bits define the command to be executed when the CMDEX key is written.

Important: For PIC32CM LS00/LS60, only ER, WP, PBC, SDAL0 commands are available from the non-secure alias. Non-secure ER, WP, PBC are processed only if ADDR points to a non secure address, otherwise a PROGE error is issued.


Value	Group Configuration	Description
0x00-0x01	-	Reserved
0x02	ER	Erase Row - Erases the row addressed by the ADDR register in the Flash, Data Flash or NVM Configuration Rows.
0x03	-	Reserved
0x04	WP	Write Page - Writes the contents of the page buffer to the page addressed by the ADDR register.
0x05-0x41	-	Reserved
0x42	SPRM	Sets the Power Reduction Mode.
0x43	CPRM	Clears the Power Reduction Mode.
0x44	PBC	Page Buffer Clear - Clears the page buffer.
0x45	-	Reserved
0x46	INVALL	Invalidates all cache lines.
0x47-0x4A	-	Reserved
0x4B	SDAL0	Set DAL=0
0x4C (PIC32CM LE00 )	-	Reserved
0x4C (PIC32CM LS00/LS60 )	SDAL1	Set DAL=1
0x4D (PIC32CM LE00 )	-	Reserved
0x4D (PIC32CM LS00/LS60 )	SDAL2	Set DAL=2 (if BOCOR.SECCFGLOCK == 1) Reserved (if BOCOR.SECCFGLOCK == 0)
0x4E-0x7F	-	Reserved