This register is loaded from UROW during Boot ROM execution.
Important: if BOCOR.SECCFGLOCK
== 0 after exiting the Boot ROM:
The secure software code of the
Flash BOOT region, before passing control on to the secure software code of the
Flash APPLICATION region, MUST lock the NVMCTRL memory security
configurations by clearing the NVMCTRL.SECCTRL.SCFGWEN bit.
Write accesses (W*) are
allowed.
Name:
SCFGAD
Offset:
0x3C
Reset:
x initially determined from NVM User Row after
reset
Property:
-
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
URWEN
Access
R/-/RW*
Reset
x
Bit 0 – URWEN User Row Write
Enable
Value
Description
0
UROW is not
writable.
1
UROW is
writable.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
