4.4 100-pin TQFP

100-PIN TQFP (Top View)
PIC32CM2532(LE00/LS00)100 PIC32CM5164(LE00/LS00/LS60)100

1

PA00 / XIN32

EXTINT[0]

XY[0]

OANEG[1]

SERCOM1/
PAD[0]

6

TCC2/WO[0]

AVDD

I/O, Hi-Z

2

PA01 / XOUT32

EXTINT[1]

XY[1]

OAPOS[1]

SERCOM1/
PAD[1]

6

TCC2/WO[1]

AVDD

I/O, Hi-Z

3

PC00⁽⁶⁾

EXTINT[8]

AIN[20]

AVDD

I/O, Hi-Z

4

PC01

EXTINT[9]

AIN[21]

AVDD

I/O, Hi-Z

5

PC02

EXTINT[10]

AIN[22]

AVDD

I/O, Hi-Z

6

PC03

EXTINT[11]

AIN[23]

AVDD

I/O, Hi-Z

7

PA02⁽³⁾

EXTINT[2]

AIN[0]

XY[2]

VOUT0

OANEG[0]

SERCOM0/
PAD[2]

3

TCC3/WO[0]

AVDD

I/O, Hi-Z

8

PA03

EXTINT[3]

VREFA

AIN[1]

XY[3]

OANEG[2]

SERCOM0/
PAD[3]

3

TCC3/WO[1]

AVDD

I/O, Hi-Z

9

PB04

EXTINT[4]

AIN[12]

AIN[6]

XY[26]

OAOUT[1]

AVDD

I/O, Hi-Z

10

PB05

EXTINT[5]

AIN[13]

AIN[7]

XY[27]

AVDD

I/O, Hi-Z

11

AVSS

12

AVDD

13

PB06

EXTINT[6]

AIN[14]

XY[28]

IN[6]

AVDD

I/O, Hi-Z

14

PB07

EXTINT[7]

AIN[15]

XY[29]

IN[7]

AVDD

I/O, Hi-Z

15

PB08

EXTINT[8]

AIN[18]

XY[20]

SERCOM3/
PAD[0]

4

TC0/WO[0]

IN[8]

TCC3/WO[6]

AVDD

I/O, Hi-Z

16

PB09

EXTINT[9]

AIN[19]

XY[21]

SERCOM3/
PAD[1]

4

TC0/WO[1]

OUT[2]

TCC3/WO[7]

AVDD

I/O, Hi-Z

17

PA04

EXTINT[4]

VREFB

AIN[2]

AIN[0]

OAOUT[2]

SERCOM0/
PAD[0]

3

TCC0/WO[0]

IN[0]

TCC3/WO[2]

AVDD

I/O, Hi-Z

18

PA05

EXTINT[5]

AIN[3]

AIN[1]

XY[4]

OAPOS[2]

SERCOM0/
PAD[1]

3

TCC0/WO[1]

IN[1]

TCC3/WO[3]

AVDD

I/O, Hi-Z

19

PA06

EXTINT[6]

AIN[4]

AIN[2]

XY[5]

OAPOS[0]

SERCOM0/
PAD[2]

3

TCC1/WO[0]

IN[2]

TCC3/WO[4]

AVDD

I/O, Hi-Z

20

PA07⁽³⁾

EXTINT[7]

AIN[5]

AIN[3]

VOUT1

OAOUT[0]

SERCOM0/
PAD[3]

3

TCC1/WO[1]

OUT[0]

TCC3/WO[5]

AVDD

I/O, Hi-Z

21

PC05

EXTINT[13]

AVDD

I/O, Hi-Z

22

PC06

EXTINT[14]

AVDD

I/O, Hi-Z

23

PC07

EXTINT[15]

AVDD

I/O, Hi-Z

24

AVSS

25

AVDD

26

PA08

NMI

AIN[6]

XY[6]

SERCOM1/PAD[0]

1

SERCOM2/
PAD[0]

2

TCC0/WO[0]

RTC/IN[0]

IN[3]

TCC1/WO[2]

SDI

1

VDD

I/O, Hi-Z

27

PA09

EXTINT[0]

AIN[7]

XY[7]

SERCOM1/PAD[1]

1

SERCOM2/
PAD[1]

2

TCC0/WO[1]

RTC/IN[1]

IN[4]

TCC1/WO[3]

MCK[0]

1,2

VDD

I/O, Hi-Z

28

PA10

EXTINT[1]

AIN[8]

XY[8]

SERCOM1/PAD[2]

1, 6

SERCOM2/
PAD[2]

2

TCC1/WO[0]

GCLK/IO[4]

IN[5]

TCC0/WO[2]

SCK[0]

1

VDD

I/O, Hi-Z

29

PA11

EXTINT[2]

AIN[9]

XY[9]

SERCOM1/PAD[3]

1, 6

SERCOM2/
PAD[3]

2

TCC1/WO[1]

GCLK/IO[3]

OUT[1]

TCC0/WO[3]

FS[0]

2

VDD

I/O, Hi-Z

30

PC08

EXTINT[0]

VDD

I/O, Hi-Z

31

PC09

EXTINT[1]

VDD

I/O, Hi-Z

32

PC10

EXTINT[2]

SERCOM1/PAD[2]

2

VDD

I/O, Hi-Z

33

PC11

EXTINT[3]

SERCOM1/PAD[3]

2

VDD

I/O, Hi-Z

34

PC12

EXTINT[4]

SERCOM1/PAD[0]

2

VDD

I/O, Hi-Z

35

PC13

EXTINT[5]

SERCOM1/PAD[1]

2

VDD

I/O, Hi-Z

36

AVSSPLL

37

VDD

38

VSS

39

VDDPLL

40

PB12

EXTINT[12]

XY[30]

SERCOM3/PAD[0]

1

TC0/WO[0]

GCLK/IO[6]

TCC0/WO[6]

FS[1]

1,2

VDD

I/O, Hi-Z

41

PB13

EXTINT[13]

XY[31]

SERCOM3/PAD[1]

1

TC0/WO[1]

GCLK/IO[7]

TCC0/WO[7]

MCK[1]

1,2

VDD

I/O, Hi-Z

42

PB14

EXTINT[14]

SERCOM3/PAD[2]

1, 4

TC1/WO[0]

RTC/IN[4]

GCLK/IO[0]

IN[9]

VDD

I/O, Hi-Z

43

PB15

EXTINT[15]

SERCOM3/PAD[3]

1, 4

TC1/WO[1]

RTC/IN[5]

GCLK/IO[1]

IN[10]

VDD

I/O, Hi-Z

44

PC14

EXTINT[6]

RTC/IN[6]

VDD

I/O, Hi-Z

45

PC15

EXTINT[7]

RTC/IN[7]

VDD

I/O, Hi-Z

46

PA12

EXTINT[12]

XY[24]

SERCOM2/PAD[0]

1

SERCOM4/
PAD[0]

2

TCC2/WO[0]

AC/CMP[0]

TCC0/WO[6]

VDD

I/O, Hi-Z

47

PA13

EXTINT[13]

XY[25]

SERCOM2/PAD[1]

1

SERCOM4/
PAD[1]

2

TCC2/WO[1]

AC/CMP[1]

TCC0/WO[7]

VDD

I/O, Hi-Z

48

PA14 / XIN

EXTINT[3]

XY[10]

SERCOM2/PAD[2]

1

SERCOM0/
PAD[2]

4

TC0/WO[0]

GCLK/IO[0]

TCC0/WO[4]

VDD

I/O, Hi-Z

49

PA15 / XOUT

EXTINT[4]

XY[11]

SERCOM2/PAD[3]

1

SERCOM0/
PAD[3]

4

TC0/WO[1]

GCLK/IO[1]

TCC0/WO[5]

VDD

I/O, Hi-Z

50

VSS

51

VDD

52

PA16

EXTINT[5]

XY[12]

SERCOM1/PAD[0]

3

SERCOM0/
PAD[0]

4

TCC2/WO[0]

RTC/IN[2]

GCLK/IO[2]

IN[0]

TCC0/WO[6]

VDD

I/O, Hi-Z

53

PA17

EXTINT[6]

XY[13]

SERCOM1/PAD[1]

3

SERCOM0/
PAD[1]

4

TCC2/WO[1]

RTC/IN[3]

GCLK/IO[3]

IN[1]

TCC0/WO[7]

VDD

I/O, Hi-Z

54

PA18

EXTINT[7]

XY[14]

SERCOM1/PAD[2]

3

SERCOM0/
PAD[2]

4

TC2/WO[0]

RTC/OUT[0]

AC/CMP[0]

IN[2]

TCC0/WO[2]

FS[0]

1

VDD

I/O, Hi-Z

55

PA19

EXTINT[0]

XY[15]

SERCOM1/PAD[3]

3

SERCOM0/
PAD[3]

4

TC2/WO[1]

RTC/OUT[1]

AC/CMP[1]

OUT[0]

TCC0/WO[3]

SDO

1,2

VDD

I/O, Hi-Z

56

PC16

EXTINT[8]

VDD

I/O, Hi-Z

57

PC17

EXTINT[9]

VDD

I/O, Hi-Z

58

PC18

EXTINT[10]

VDD

I/O, Hi-Z

59

PC19

EXTINT[11]

VDD

I/O, Hi-Z

60

PC20

EXTINT[12]

IN[10]

VDD

I/O, Hi-Z

61

PC21

EXTINT[13]

VDD

I/O, Hi-Z

62

VSS

63

VDD

64

PB16

EXTINT[0]

SERCOM5/PAD[0]

1

TC2/WO[0]

RTC/OUT[4]

GCLK/IO[2]

IN[11]

TCC0/WO[4]

SDI

2

VDD

I/O, Hi-Z

65

PB17

EXTINT[1]

SERCOM5/PAD[1]

1

TC2/WO[1]

RTC/OUT[5]

GCLK/IO[3]

OUT[3]

TCC0/WO[5]

VDD

I/O, Hi-Z

66

PB18

EXTINT[2]

SERCOM5/PAD[2]

1

SERCOM3/PAD[2]

2

RTC/OUT[6]

TCC0/WO[0]

VDD

I/O, Hi-Z

67

PB19

EXTINT[3]

SERCOM5/PAD[3]

1

SERCOM3/PAD[3]

2

RTC/OUT[7]

TCC0/WO[1]

VDD

I/O, Hi-Z

68

PB20

EXTINT[4]

SERCOM3/PAD[0]

2

SERCOM5/PAD[0]

2

TCC0/WO[2]

VDD

I/O, Hi-Z

69

PB21

EXTINT[5]

SERCOM3/PAD[1]

2

SERCOM5/PAD[1]

2

TCC0/WO[3]

VDD

I/O, Hi-Z

70

PA20

EXTINT[4]

XY[22]

SERCOM3/PAD[2]

2,3

SERCOM2/
PAD[2]

3

TC1/WO[0]

GCLK/IO[4]

IN[5]

TCC0/WO[6]

SCK[0]

2

VDD

I/O, Hi-Z

71

PA21

EXTINT[5]

XY[23]

SERCOM3/PAD[3]

2,3

SERCOM2/
PAD[3]

3

GCLK/IO[5]

TCC0/WO[7]

SCK[1]

1,2

VDD

I/O, Hi-Z

72

PA22

EXTINT[1]

XY[16]

SERCOM0/PAD[0]

1

SERCOM2/
PAD[0]

3

TC0/WO[0]

RTC/OUT[2]

GCLK/IO[2]

IN[6]

TCC0/WO[4]

VDD

I/O, Hi-Z

73

PA23

EXTINT[2]

XY[17]

SERCOM0/PAD[1]

1

SERCOM2/
PAD[1]

3

TC0/WO[1]

RTC/OUT[3]

GCLK/IO[1]

IN[7]

TCC0/WO[5]

VDD

I/O, Hi-Z

74

PA24

EXTINT[3]

SERCOM0/PAD[2]

1

SERCOM2/
PAD[2]

3

TC1/WO[0]

USB/DM

AC/CMP[2]

IN[8]

TCC1/WO[2]

VDD

I/O, Hi-Z

75

PA25

EXTINT[4]

SERCOM0/PAD[3]

1

SERCOM2/
PAD[3]

3

TC1/WO[1]

USB/DP

AC/CMP[3]

OUT[2]

TCC1/WO[3]

VDD

I/O, Hi-Z

76

VSS

77

VDD

78

PB22

EXTINT[6]

SERCOM0/PAD[2]

1, 2

SERCOM5/
PAD[2]

2,4

USB/SOF_1KHZ

GCLK/IO[0]

IN[0]

TCC3/WO[0]

VDD

I/O, Hi-Z

79

PB23

EXTINT[7]

SERCOM0/PAD[3]

1, 2

SERCOM5/
PAD[3]

2,4

GCLK/IO[1]

OUT[0]

TCC3/WO[1]

VDD

I/O, Hi-Z

80

PB24

EXTINT[8]

SERCOM0/PAD[0]

2

SERCOM4/PAD[0]

1

AC/CMP[2]

VDD

I/O, Hi-Z

81

PB25

EXTINT[9]

SERCOM0/PAD[1]

2

SERCOM4/PAD[1]

1

AC/CMP[3]

VDD

I/O, Hi-Z

82

PC24

EXTINT[0]

SERCOM0/PAD[2]

2

SERCOM4/PAD[2]

1, 2

TC2/WO[0]

VDD

I/O, Hi-Z

83

PC25

EXTINT[1]

SERCOM0/PAD[3]

2

SERCOM4/PAD[3]

1,2

TC2/WO[1]

VDD

I/O, Hi-Z

84

PC26

EXTINT[2]

VDD

I/O, Hi-Z

85

PC27

EXTINT[3]

SERCOM1/PAD[0]

5

VDD

I/O, Hi-Z

86

PC28

EXTINT[4]

SERCOM1/PAD[1]

5

VDD

I/O, Hi-Z

87

VSS

88

RESET

VDD

I, PU

89

VDDCORE

90

VSSCORE

91

VDDOUT

92

VDD

93

PA30 / SWCLK

EXTINT[6]

XY[18]

SERCOM1/
PAD[2]

4, 5

TCC1/WO[0]

SWCLK

GCLK/IO[0]

IN[3]

TCC3/WO[4]

VDD

SWCLK, I, PU

94

PA31 / SWDIO

EXTINT[7]

XY[19]

SERCOM1/
PAD[3]

4, 5

TCC1/WO[1]

OUT[1]

TCC3/WO[5]

VDD

I/O, Hi-Z

95

PB30

EXTINT[14]

SERCOM1/PAD[0]

4

SERCOM5/PAD[0]

3

TCC0/WO[0]

TCC1/WO[2]

VDD

I/O, Hi-Z

96

PB31

EXTINT[15]

SERCOM1/PAD[1]

4

SERCOM5/PAD[1]

3

TCC0/WO[1]

TCC1/WO[3]

VDD

I/O, Hi-Z

97

PB00

EXTINT[0]

AIN[16]

SERCOM3/PAD[2]

3

SERCOM5/PAD[2]

3, 4

IN[1]

VDD

I/O, Hi-Z

98

PB01

EXTINT[1]

AIN[17]

SERCOM3/PAD[3]

3

SERCOM5/PAD[3]

3, 4

IN[2]

VDD

I/O, Hi-Z

99

PB02

EXTINT[2]

AIN[10]

AIN[4]

SERCOM3/PAD[0]

3

SERCOM5/
PAD[0]

4

TC2/WO[0]

OUT[0]

TCC3/WO[2]

VDD

I/O, Hi-Z

100

PB03⁽⁶⁾

EXTINT[3]

AIN[11]

AIN[5]

SERCOM3/PAD[1]

3

SERCOM5/
PAD[1]

4

TC2/WO[1]

TCC3/WO[3]

VDD

I/O, Hi-Z

Note:

All analog pin functions are on the peripheral function B. The peripheral function B must be selected to disable the digital control of the pin.
Refer to TCC peripheral chapter for the list of supported features for each peripheral instance.
When DAC0 or DAC1 channel is enabled, respective VOUT0 (PA02) or VOUT1 (PA07) pins cannot be used for other purposes (excluding analog inputs).
I²C is not supported on all SERCOM pins. Refer to SERCOM I²C peripheral chapter for the list of supported features for each peripheral instance.
SERCOM1 signals are not available for the PIC32CM LS60 family as reserved for ATECC608B interconnection.
The transition time of the following pins must be greater than 50μs in order to not affect the XOSC32 cycle to cycle jitter.

Pin	Pin Name	A	B ^(1,3)						C^(4,5)		D^(4,5)		E⁽²⁾	G	H	I	J⁽²⁾	K		Power Rail	Reset State
TQFP100	Pin Name	EIC	REF	ADC	AC	PTC	DAC	OPAMP	SERCOM	IOSET	SERCOM ALT	IOSET	TC / TCC	RTC / USB / Debug	AC / GCLK	CCL	TCC	I2S	IOSET	Power Rail	Reset State
1	PA00 / XIN32	EXTINT[0]				XY[0]		OANEG[1]			SERCOM1/ PAD[0]	6	TCC2/WO[0]							AVDD	I/O, Hi-Z
2	PA01 / XOUT32	EXTINT[1]				XY[1]		OAPOS[1]			SERCOM1/ PAD[1]	6	TCC2/WO[1]							AVDD	I/O, Hi-Z
3	PC00⁽⁶⁾	EXTINT[8]		AIN[20]																AVDD	I/O, Hi-Z
4	PC01	EXTINT[9]		AIN[21]																AVDD	I/O, Hi-Z
5	PC02	EXTINT[10]		AIN[22]																AVDD	I/O, Hi-Z
6	PC03	EXTINT[11]		AIN[23]																AVDD	I/O, Hi-Z
7	PA02⁽³⁾	EXTINT[2]		AIN[0]		XY[2]	VOUT0	OANEG[0]			SERCOM0/ PAD[2]	3					TCC3/WO[0]			AVDD	I/O, Hi-Z
8	PA03	EXTINT[3]	VREFA	AIN[1]		XY[3]		OANEG[2]			SERCOM0/ PAD[3]	3					TCC3/WO[1]			AVDD	I/O, Hi-Z
9	PB04	EXTINT[4]		AIN[12]	AIN[6]	XY[26]		OAOUT[1]												AVDD	I/O, Hi-Z
10	PB05	EXTINT[5]		AIN[13]	AIN[7]	XY[27]														AVDD	I/O, Hi-Z
11	AVSS
12	AVDD
13	PB06	EXTINT[6]		AIN[14]		XY[28]										IN[6]				AVDD	I/O, Hi-Z
14	PB07	EXTINT[7]		AIN[15]		XY[29]										IN[7]				AVDD	I/O, Hi-Z
15	PB08	EXTINT[8]		AIN[18]		XY[20]					SERCOM3/ PAD[0]	4	TC0/WO[0]			IN[8]	TCC3/WO[6]			AVDD	I/O, Hi-Z
16	PB09	EXTINT[9]		AIN[19]		XY[21]					SERCOM3/ PAD[1]	4	TC0/WO[1]			OUT[2]	TCC3/WO[7]			AVDD	I/O, Hi-Z
17	PA04	EXTINT[4]	VREFB	AIN[2]	AIN[0]			OAOUT[2]			SERCOM0/ PAD[0]	3	TCC0/WO[0]			IN[0]	TCC3/WO[2]			AVDD	I/O, Hi-Z
18	PA05	EXTINT[5]		AIN[3]	AIN[1]	XY[4]		OAPOS[2]			SERCOM0/ PAD[1]	3	TCC0/WO[1]			IN[1]	TCC3/WO[3]			AVDD	I/O, Hi-Z
19	PA06	EXTINT[6]		AIN[4]	AIN[2]	XY[5]		OAPOS[0]			SERCOM0/ PAD[2]	3	TCC1/WO[0]			IN[2]	TCC3/WO[4]			AVDD	I/O, Hi-Z
20	PA07⁽³⁾	EXTINT[7]		AIN[5]	AIN[3]		VOUT1	OAOUT[0]			SERCOM0/ PAD[3]	3	TCC1/WO[1]			OUT[0]	TCC3/WO[5]			AVDD	I/O, Hi-Z
21	PC05	EXTINT[13]																		AVDD	I/O, Hi-Z
22	PC06	EXTINT[14]																		AVDD	I/O, Hi-Z
23	PC07	EXTINT[15]																		AVDD	I/O, Hi-Z
24	AVSS
25	AVDD
26	PA08	NMI		AIN[6]		XY[6]			SERCOM1/PAD[0]	1	SERCOM2/ PAD[0]	2	TCC0/WO[0]	RTC/IN[0]		IN[3]	TCC1/WO[2]	SDI	1	VDD	I/O, Hi-Z
27	PA09	EXTINT[0]		AIN[7]		XY[7]			SERCOM1/PAD[1]	1	SERCOM2/ PAD[1]	2	TCC0/WO[1]	RTC/IN[1]		IN[4]	TCC1/WO[3]	MCK[0]	1,2	VDD	I/O, Hi-Z
28	PA10	EXTINT[1]		AIN[8]		XY[8]			SERCOM1/PAD[2]	1, 6	SERCOM2/ PAD[2]	2	TCC1/WO[0]		GCLK/IO[4]	IN[5]	TCC0/WO[2]	SCK[0]	1	VDD	I/O, Hi-Z
29	PA11	EXTINT[2]		AIN[9]		XY[9]			SERCOM1/PAD[3]	1, 6	SERCOM2/ PAD[3]	2	TCC1/WO[1]		GCLK/IO[3]	OUT[1]	TCC0/WO[3]	FS[0]	2	VDD	I/O, Hi-Z
30	PC08	EXTINT[0]																		VDD	I/O, Hi-Z
31	PC09	EXTINT[1]																		VDD	I/O, Hi-Z
32	PC10	EXTINT[2]							SERCOM1/PAD[2]	2										VDD	I/O, Hi-Z
33	PC11	EXTINT[3]							SERCOM1/PAD[3]	2										VDD	I/O, Hi-Z
34	PC12	EXTINT[4]							SERCOM1/PAD[0]	2										VDD	I/O, Hi-Z
35	PC13	EXTINT[5]							SERCOM1/PAD[1]	2										VDD	I/O, Hi-Z
36	AVSSPLL
37	VDD
38	VSS
39	VDDPLL
40	PB12	EXTINT[12]				XY[30]			SERCOM3/PAD[0]	1			TC0/WO[0]		GCLK/IO[6]		TCC0/WO[6]	FS[1]	1,2	VDD	I/O, Hi-Z
41	PB13	EXTINT[13]				XY[31]			SERCOM3/PAD[1]	1			TC0/WO[1]		GCLK/IO[7]		TCC0/WO[7]	MCK[1]	1,2	VDD	I/O, Hi-Z
42	PB14	EXTINT[14]							SERCOM3/PAD[2]	1, 4			TC1/WO[0]	RTC/IN[4]	GCLK/IO[0]	IN[9]				VDD	I/O, Hi-Z
43	PB15	EXTINT[15]							SERCOM3/PAD[3]	1, 4			TC1/WO[1]	RTC/IN[5]	GCLK/IO[1]	IN[10]				VDD	I/O, Hi-Z
44	PC14	EXTINT[6]												RTC/IN[6]						VDD	I/O, Hi-Z
45	PC15	EXTINT[7]												RTC/IN[7]						VDD	I/O, Hi-Z
46	PA12	EXTINT[12]				XY[24]			SERCOM2/PAD[0]	1	SERCOM4/ PAD[0]	2	TCC2/WO[0]		AC/CMP[0]		TCC0/WO[6]			VDD	I/O, Hi-Z
47	PA13	EXTINT[13]				XY[25]			SERCOM2/PAD[1]	1	SERCOM4/ PAD[1]	2	TCC2/WO[1]		AC/CMP[1]		TCC0/WO[7]			VDD	I/O, Hi-Z
48	PA14 / XIN	EXTINT[3]				XY[10]			SERCOM2/PAD[2]	1	SERCOM0/ PAD[2]	4	TC0/WO[0]		GCLK/IO[0]		TCC0/WO[4]			VDD	I/O, Hi-Z
49	PA15 / XOUT	EXTINT[4]				XY[11]			SERCOM2/PAD[3]	1	SERCOM0/ PAD[3]	4	TC0/WO[1]		GCLK/IO[1]		TCC0/WO[5]			VDD	I/O, Hi-Z
50	VSS
51	VDD
52	PA16	EXTINT[5]				XY[12]			SERCOM1/PAD[0]	3	SERCOM0/ PAD[0]	4	TCC2/WO[0]	RTC/IN[2]	GCLK/IO[2]	IN[0]	TCC0/WO[6]			VDD	I/O, Hi-Z
53	PA17	EXTINT[6]				XY[13]			SERCOM1/PAD[1]	3	SERCOM0/ PAD[1]	4	TCC2/WO[1]	RTC/IN[3]	GCLK/IO[3]	IN[1]	TCC0/WO[7]			VDD	I/O, Hi-Z
54	PA18	EXTINT[7]				XY[14]			SERCOM1/PAD[2]	3	SERCOM0/ PAD[2]	4	TC2/WO[0]	RTC/OUT[0]	AC/CMP[0]	IN[2]	TCC0/WO[2]	FS[0]	1	VDD	I/O, Hi-Z
55	PA19	EXTINT[0]				XY[15]			SERCOM1/PAD[3]	3	SERCOM0/ PAD[3]	4	TC2/WO[1]	RTC/OUT[1]	AC/CMP[1]	OUT[0]	TCC0/WO[3]	SDO	1,2	VDD	I/O, Hi-Z
56	PC16	EXTINT[8]																		VDD	I/O, Hi-Z
57	PC17	EXTINT[9]																		VDD	I/O, Hi-Z
58	PC18	EXTINT[10]																		VDD	I/O, Hi-Z
59	PC19	EXTINT[11]																		VDD	I/O, Hi-Z
60	PC20	EXTINT[12]														IN[10]				VDD	I/O, Hi-Z
61	PC21	EXTINT[13]																		VDD	I/O, Hi-Z
62	VSS
63	VDD
64	PB16	EXTINT[0]							SERCOM5/PAD[0]	1			TC2/WO[0]	RTC/OUT[4]	GCLK/IO[2]	IN[11]	TCC0/WO[4]	SDI	2	VDD	I/O, Hi-Z
65	PB17	EXTINT[1]							SERCOM5/PAD[1]	1			TC2/WO[1]	RTC/OUT[5]	GCLK/IO[3]	OUT[3]	TCC0/WO[5]			VDD	I/O, Hi-Z
66	PB18	EXTINT[2]							SERCOM5/PAD[2]	1	SERCOM3/PAD[2]	2		RTC/OUT[6]			TCC0/WO[0]			VDD	I/O, Hi-Z
67	PB19	EXTINT[3]							SERCOM5/PAD[3]	1	SERCOM3/PAD[3]	2		RTC/OUT[7]			TCC0/WO[1]			VDD	I/O, Hi-Z
68	PB20	EXTINT[4]							SERCOM3/PAD[0]	2	SERCOM5/PAD[0]	2					TCC0/WO[2]			VDD	I/O, Hi-Z
69	PB21	EXTINT[5]							SERCOM3/PAD[1]	2	SERCOM5/PAD[1]	2					TCC0/WO[3]			VDD	I/O, Hi-Z
70	PA20	EXTINT[4]				XY[22]			SERCOM3/PAD[2]	2,3	SERCOM2/ PAD[2]	3	TC1/WO[0]		GCLK/IO[4]	IN[5]	TCC0/WO[6]	SCK[0]	2	VDD	I/O, Hi-Z
71	PA21	EXTINT[5]				XY[23]			SERCOM3/PAD[3]	2,3	SERCOM2/ PAD[3]	3			GCLK/IO[5]		TCC0/WO[7]	SCK[1]	1,2	VDD	I/O, Hi-Z
72	PA22	EXTINT[1]				XY[16]			SERCOM0/PAD[0]	1	SERCOM2/ PAD[0]	3	TC0/WO[0]	RTC/OUT[2]	GCLK/IO[2]	IN[6]	TCC0/WO[4]			VDD	I/O, Hi-Z
73	PA23	EXTINT[2]				XY[17]			SERCOM0/PAD[1]	1	SERCOM2/ PAD[1]	3	TC0/WO[1]	RTC/OUT[3]	GCLK/IO[1]	IN[7]	TCC0/WO[5]			VDD	I/O, Hi-Z
74	PA24	EXTINT[3]							SERCOM0/PAD[2]	1	SERCOM2/ PAD[2]	3	TC1/WO[0]	USB/DM	AC/CMP[2]	IN[8]	TCC1/WO[2]			VDD	I/O, Hi-Z
75	PA25	EXTINT[4]							SERCOM0/PAD[3]	1	SERCOM2/ PAD[3]	3	TC1/WO[1]	USB/DP	AC/CMP[3]	OUT[2]	TCC1/WO[3]			VDD	I/O, Hi-Z
76	VSS
77	VDD
78	PB22	EXTINT[6]							SERCOM0/PAD[2]	1, 2	SERCOM5/ PAD[2]	2,4		USB/SOF_1KHZ	GCLK/IO[0]	IN[0]	TCC3/WO[0]			VDD	I/O, Hi-Z
79	PB23	EXTINT[7]							SERCOM0/PAD[3]	1, 2	SERCOM5/ PAD[3]	2,4			GCLK/IO[1]	OUT[0]	TCC3/WO[1]			VDD	I/O, Hi-Z
80	PB24	EXTINT[8]							SERCOM0/PAD[0]	2	SERCOM4/PAD[0]	1			AC/CMP[2]					VDD	I/O, Hi-Z
81	PB25	EXTINT[9]							SERCOM0/PAD[1]	2	SERCOM4/PAD[1]	1			AC/CMP[3]					VDD	I/O, Hi-Z
82	PC24	EXTINT[0]							SERCOM0/PAD[2]	2	SERCOM4/PAD[2]	1, 2	TC2/WO[0]							VDD	I/O, Hi-Z
83	PC25	EXTINT[1]							SERCOM0/PAD[3]	2	SERCOM4/PAD[3]	1,2	TC2/WO[1]							VDD	I/O, Hi-Z
84	PC26	EXTINT[2]																		VDD	I/O, Hi-Z
85	PC27	EXTINT[3]									SERCOM1/PAD[0]	5								VDD	I/O, Hi-Z
86	PC28	EXTINT[4]									SERCOM1/PAD[1]	5								VDD	I/O, Hi-Z
87	VSS
88	RESET																			VDD	I, PU
89	VDDCORE
90	VSSCORE
91	VDDOUT
92	VDD
93	PA30 / SWCLK	EXTINT[6]				XY[18]					SERCOM1/ PAD[2]	4, 5	TCC1/WO[0]	SWCLK	GCLK/IO[0]	IN[3]	TCC3/WO[4]			VDD	SWCLK, I, PU
94	PA31 / SWDIO	EXTINT[7]				XY[19]					SERCOM1/ PAD[3]	4, 5	TCC1/WO[1]			OUT[1]	TCC3/WO[5]			VDD	I/O, Hi-Z
95	PB30	EXTINT[14]							SERCOM1/PAD[0]	4	SERCOM5/PAD[0]	3	TCC0/WO[0]				TCC1/WO[2]			VDD	I/O, Hi-Z
96	PB31	EXTINT[15]							SERCOM1/PAD[1]	4	SERCOM5/PAD[1]	3	TCC0/WO[1]				TCC1/WO[3]			VDD	I/O, Hi-Z
97	PB00	EXTINT[0]		AIN[16]					SERCOM3/PAD[2]	3	SERCOM5/PAD[2]	3, 4				IN[1]				VDD	I/O, Hi-Z
98	PB01	EXTINT[1]		AIN[17]					SERCOM3/PAD[3]	3	SERCOM5/PAD[3]	3, 4				IN[2]				VDD	I/O, Hi-Z
99	PB02	EXTINT[2]		AIN[10]	AIN[4]				SERCOM3/PAD[0]	3	SERCOM5/ PAD[0]	4	TC2/WO[0]			OUT[0]	TCC3/WO[2]			VDD	I/O, Hi-Z
100	PB03⁽⁶⁾	EXTINT[3]		AIN[11]	AIN[5]				SERCOM3/PAD[1]	3	SERCOM5/ PAD[1]	4	TC2/WO[1]				TCC3/WO[3]			VDD	I/O, Hi-Z
Note: All analog pin functions are on the peripheral function B. The peripheral function B must be selected to disable the digital control of the pin. Refer to TCC peripheral chapter for the list of supported features for each peripheral instance. When DAC0 or DAC1 channel is enabled, respective VOUT0 (PA02) or VOUT1 (PA07) pins cannot be used for other purposes (excluding analog inputs). I²C is not supported on all SERCOM pins. Refer to SERCOM I²C peripheral chapter for the list of supported features for each peripheral instance. SERCOM1 signals are not available for the PIC32CM LS60 family as reserved for ATECC608B interconnection. The transition time of the following pins must be greater than 50μs in order to not affect the XOSC32 cycle to cycle jitter.