49.18 DFLLULP Electrical Specifications

Table 49-22. DFLLULP (Digital Frequency Locked Loop) Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDD = AVDD = 1.62V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
DFLLULP (Closed Loop Only)
DFLL_31	DFLLULP_CL_F_IN	DFLLULP Closed loop Input Frequency Range	32	32.768	33	kHz	-
DFLL_33	DFLLULP_CL_F_OUT	DFLLULP Closed Loop Clock Frequency	7.7	8	8.3	MHz	LDO Mode, Performance Level 0 Mode, XOSC32 32.768 kHz PPM≤100
DFLL_33A			30.9	32	33.1		LDO Mode, Performance Level 2 Mode, XOSC32 32.768 kHz PPM≤100
DFLL_33B			7.7	8	8.3		BUCK Mode, Performance Level 0 Mode, XOSC32 32.768 kHz PPM≤100
DFLL_33C			30.8	32	33.2		BUCK Mode, Performance Level 2 Mode, XOSC32 32.768 kHz PPM≤100
DFLL_35	DFLLULP_CL_Jitter	DFLLULP Period Jitter Pk-to-Pk	—	—	5.5	%	LDO Mode, Performance Level 0 Mode, f_EXTERNAL=32.768 kHz @ ≤100ppm
DFLL_35A			—	—	5.7		LDO Mode, Performance Level 2 Mode, f_EXTERNAL=32.768 kHz @ ≤100ppm
DFLL_35B			—	—	7.7		LDO Mode, Performance Level 0 Mode, f_EXTERNAL=32.768 kHz @ ≤100ppm
DFLL_35C			—	—	6.8		LDO Mode, Performance Level 2 Mode, f_EXTERNAL=32.768 kHz @ ≤100ppm
DFLL_37	DFLLULP_CL_SRT	DFLLULP Closed Loop Mode Lock Time	—	—	362	µs	Closed Loop mode, f_EXTERNAL=32.768 kHz @ ≤100ppm Binary Search mode enabled