49.29 I2S Electrical Specifications (PL2)
AC CHARACTERISTICS | Standard
Operating Conditions: VDD = AVDD = 1.62V to 3.63V (unless otherwise
stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial | ||||||
---|---|---|---|---|---|---|---|
Param. No. | Symbol | Characteristics | Min. | Typ. | Max. | Units | Conditions |
I2S_1 | fM_MCK | Host MCK Frequency | — | — | 19.4 | MHz | VDD=1.8V, CLOAD=30pF(MAX) |
— | — | 27 | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_3 | tMCKL | MCK Output Low Time | 1/(2*fM_SCK) | — | — | ns | — |
I2S_5 | tMCKH | MCK Output High Time | 1/(2*fM_SCK) | — | — | ns | — |
I2S_7 | tMCKR | MCK Rise Time | DI_25 | ns | DI_25: Refer to I/O Pin Electrical Specifications | ||
I2S_9 | tMCKF | MCK Fall Time | DI_27 | ns | DI_27: Refer to I/O Pin Electrical Specifications | ||
I2S_11 | fM_SCK | Host SCK Frequency | — | — | 7 | MHz | VDD=1.8V, CLOAD=30pF(MAX) |
— | — | 7 | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_13 | tSCKL | SCK Output Low Time | 1/(2*fM_SCK) | — | — | ns | — |
I2S_15 | tSCKH | SCK Output High Time | 1/(2*fM_SCK) | — | — | ns | — |
I2S_17 | tSCKR | SCK Rise Time | DI_25 | ns | DI_25: Refer to I/O Pin Electrical Specifications | ||
I2S_19 | tSCKF | SCK Fall Time | DI_27 | ns | DI_27: Refer to I/O Pin Electrical Specifications | ||
I2S_21 | tM_FSVALID | Host Frame Sync Valid | — | — | 11.1 | ns | VDD=1.8V, CLOAD=30pF(MAX) |
— | — | 11.2 | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_23 | tM_FSHOLD | Host Frame Sync Hold | — | — | 0 | ns | VDD=1.8V, CLOAD=30pF(MAX) |
— | — | 0 | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_25 | tM_DISETUP | Host Data Input Setup | 38.1 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
27.5 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_27 | tM_DIHOLD | Host Data Input Hold | 0 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
0 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_29 | tM_DOVALID | Host Data Output Valid | — | — | 7.1 | ns | VDD=1.8V, CLOAD=30pF(MAX) |
— | — | 6.8 | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_31 | tM_DOHOLD | Host Data Output Hold | 0.7 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
0 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_33 | fGCLK_I2S | I2S Max GLK Input Clock Freq | — | — | FCLK_29 | MHz | FCLK_29: Refer to Maximum Clock Frequencies Electrical Specifications |
Note:
|
AC CHARACTERISTICS | Standard
Operating Conditions: VDD = AVDD = 1.62V to 3.63V (unless otherwise
stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial | ||||||
---|---|---|---|---|---|---|---|
Param. No. | Symbol | Characteristics | Min. | Typ. | Max. | Units | Conditions |
I2S_41 | fS_SCK | SCK Client Frequency | — | — | 12.5 | MHz | VDD=1.8V, CLOAD=30pF(MAX) |
— | — | 12.5 | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_43 | tS_FSVALID | Frame Sync Valid | 7.5 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
7 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_45 | tS_FSHOLD | Frame Sync Hold | 0 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
0.4 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_47 | tS_DISSETUP | Data Input Client Setup | 6.3 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
5.7 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_49 | tS_DISHOLD | Data Input Client Hold | 0.6 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
1.2 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_51 | tS_DSOVALID | Data Output Client Valid | — | — | 38.6 | ns | VDD=1.8V, CLOAD=30pF(MAX) |
— | — | 27.3 | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_53 | tS_DSOHOLD | Data Output Client Hold | 33.6 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
10.1 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
Note:
|
AC CHARACTERISTICS | Standard
Operating Conditions: VDD = AVDD = 1.62V to 3.63V (unless otherwise
stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial | ||||||
---|---|---|---|---|---|---|---|
Param. No. | Symbol | Characteristics | Min. | Typ. | Max. | Units | Conditions |
I2S_55 | tSCK | SCK Frequency | — | — | 7 | MHz | VDD=1.8V, CLOAD=30pF(MAX) |
— | — | 7 | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_57 | tPDM2LS | PDM Left Channel Setup | 39.1 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
28 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_59 | tPDM2LH | PDM Left Channel Hold | 0 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
0 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_61 | tPDM2RS | PDM Right Channel Setup | 42.5 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
32.1 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
I2S_63 | tPDM2RH | PDM Right Channel Hold | 0 | — | — | ns | VDD=1.8V, CLOAD=30pF(MAX) |
0 | — | — | VDD=3.3V, CLOAD=30pF(MAX) | ||||
Note:
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