56 Data Sheet Revision History

Note: The data sheet revision is independent of the silicon revision. Refer to the Device Service Unit chapter for detailed information on Device Identification and Revision IDs for your specific device.

Revision J - December 2024

The following changes were incorporated in this revision:


Section	Updates
Ordering Information	Updated Content to reflect the addition of Extended Temperature parts
Extended Temperature Electrical Characteristics (125°C)	New section

Revision H - April 2024

The following changes were incorporated in this revision:


Section	Updates
Introduction	Added a new section for Software Tools and Support
Configuration Summary	Updated Note 1 with new information for all tables
Block Diagram	Updated Note 1 with new information
Signal Descriptions	Updated Note 1 with new information
Peripherals	Updated Note 1 with new information for all tables in Peripheral Dependencies
Processor and Architecture	Updated note 1 for the Interrupt Line Mapping table
PAC	Added a new note to the PERID bitfield of the WRCTRL register
GCLK	Updated the Important note in the GEN bitfield of the PCHCTRLm register
DMAC	Updated the Important note to the TRGSRC bitfield in the CHCTRLB Register
SERCOM	Added a note in Peripheral Dependencies
SERCOM-USART	Clarified verbiage in the Data Transmission section Added note 4 to LIN Host Added notes to the HDRLY and BRKLEN bitfields in the CTRLC register
TC	Added note 4 to Capture Operations
Packaging Information	Removed the obsolete tables from the following packages: 32-pin TQFP 32-pin VQFN 48-pin TQFP 48-pin VQFN 64-pin TQFP 64-pin VQFN 100-pin TQFP

Revision G - November 2022

The following changes were incorporated in this revision:


Section	Updates
Introduction	Updates to the specifications for Memories, System, Communication Interfaces, Advanced Analog, and Input/Output Added new packaging information to the Packages table for the 32 Lead packages
Configuration Summary	Updated Table 1-1 with new specifications for the PIC32CM LS00 Family of devices Replaced Table 1-2 with all new content
Ordering Information	Updated the Diagram with new information for 32-pin VQFN and TQFP devices
Block Diagram	Updated the Diagram with new specifications for Flash size, RAM size, and added a new note
Pinout and Packaging	Added new section for the 32-pin VQFN and 32-pin TQFP packages Updated the part numbers for the 48-pin VQFN and 48-pin TQFP
Signal Descriptions	Added new notes for the TCCx, I²C, and VREFA
Product Mapping	Added notes to the instances of TCCx and I²S
Peripherals	Updated the notes for the SERCOM Peripheral names in the Peripherals Dependencies Table
Memories	Updated Table 10-1 in Embedded Memories with a new column denoting LE00/LS00 content Updated Table 10-2 in Flash with a new row denoting LE00/LS00 content Updated Table 10-4 in Data Flash with a new row denoting LE00/LS00 content Updated Table 10-6 in SRAM and added a new table 10-7 for SRAM Sub-Blocks size Added a table to TrustRAM
Processor and Architecture	Added notes to the Interrupt Line Mapping table
SUPC	Added new BOD33 text to the BOD33RDY bitfield in the STATUS Register
PM	Added a new table for 128-KB Flash to the RAMPSWC bitfield in the PWCFG Register
DMAC	Added a note to the TRGSRC bitfield in the CHCTRLB Register
PORT	Added a note to Events for Standby Mode
EVSYS	Clarified verbiage in Features Added a new table for the EVGEN bitfield of the CHANNELn Register Added in a new User Multiplexer Table for the USERm Register
SERCOM	Updated the note in Features
SERCOM I²C	Added a new table for PIC32CM1216 Devices to Signal Description
USB	Updated text in the EPINTENSETn Register to clarify Register reset
ADC	Updated the formatting in Features
Electrical Characteristics	Added a note reference to ADC_61 for table 49-28 in ADC Electrical Specifications Updated the figure for SPI Host Mode (CPHA=0) in SPI Electrical Specifications (PL0) Updated the figure for SPI Host Mode (CPHA=0) in SPI Electrical Specifications (PL2)
Packaging Information	Added new images for 32-pin packages to Package Marking Information Added two new packages to Package Drawings: 32-pin TQFP 32-pin VQFN

Revision F - July 2022

The following changes were incorporated in this revision:


Section	Updates
Configuration Summary	Updated Table 1-2 to remove deprecated devices Ordering Information was updated with Tape and Reel in the revision history which was not in the previous revision.
Pinout and Packaging	Updated the following packages to deprecate LS60 devices from the PIC32CM2532 designation: 48-pin VQFN and 48-pin TQFP 64-pin VQFN and 64-pin TQFP 100-pin TQFP
Memories	Updated Table 10-1 in Embedded Memories with a new device designation for PIC32CM2532 devices Updated Table 10-2 in Flash with a new device designation for PIC32CM2532 devices Updated Table 10-4 in Data Flash with a new device designation for PIC32CM2532 devices Updated Table 10-6 in SRAM with a new device designation for PIC32CM2532 devices
SERCOM USART	Added new text to the first paragraph in Start-of-Frame Detection
Electrical Characteristics at 85°C	Added new sections of data for the PDSW Domain in Retention to the MCU Standby Current Consumption Electrical Specifications table
Schematic Checklist	Updated the note for Figure 52-6 in External Reset Circuit
Appendix A	Added New UART-I²C Factory Bootloader Appendix

Revision E - April 2022

The following changes were made to this document:


Section	Updates
Features	Updated the naming for the ATECC608B-TFLXTLS
Configuration Summary	Table 1-1. PIC32CM LE00/LS00/LS60 Family Features
Memories	Updated the values in the tables for Bit position 13 in: PIC32CM LE00 User Row PIC32CM LS00 User Row PIC32CM LS60 User Row
PIC32CM LS00/LS60 Specific Security Features	Replaced the text in ATECC608B CryptoAuthentication Device (PIC32CM LS60 only)
Boot ROM	Added new content to refer to Region Unlock Bits in Chip Erase
IDAU	Updated the following registers: SCFGB, SCFGA, and SCFGR
NVMCTRL	Added an Important note to Region Unlock Bits Updated Figurre NVMCTRL - Secure SRAM (RS region) Size Updated these registers: SULCK and NSULCK
SERCOM USART	Corrected oscillator naming in Start-of-Frame Detection
SERCOM I²C	Added a new note to the Signal Description
TRNG	Removed incorrect NIST References from the following sections: Overview Features Added a new note to Initialization Added a note to the ENABLE bit for the CTRLA Register
Analog Peripherals Considerations	Added new bullet points to the Caution note in Analog Peripherals Considerations
OPAMP	Replaced the Block Diagram with a new Image
TC	Updated the CTRLBCLR register
TCC	Updated these registers: CTRLBCLRand CTRLBSET
Electrical Characteristics at 85°C	Removed sections of data for the PDSW Domain in Retention from the MCU Standby Current Consumption Electrical Specifications table

Revision D - February 2022

The following changes were made to this document:


Section	Updates
Electrical Characteristics at 85°C	Added a new table for MCU Off Current Consumption.
	Updated table Absolute Maximum Ratings
	Updated Table 49-5. Thermal Packaging Characteristics (PIC32CM LE00/LS00) and Table 49-6. Thermal Packaging Characteristics (PIC32CM LS60) (

Revision C - February 2022

Along with the changes listed below, numerous typographical updates were done to the document.


Section	Updates
512-KB Flash, 64-KB SRAM with TrustZone, Crypto & Enhanced PTC	Added new information to the Timers/Output Compare/Input Capture section for PWM Modes using TC and TCC peripherals Updated anti-tamper verbiage for TrustRAM Minor reformatting of the features arrangement
Configuration Summary	Updated the entries for the TC and TCC
PIC32CM LS00/LS60 Specific Security Features	Updated the kB information in the figure, PIC32CM LS00/LS60 Default Memories Mapping - 512KB Flash Case in PIC32CM LS00/LS60 Memory Mapping Configuration Summary
Memories	Updated the Flash topic with new verbiage to enable the cache
MCLK	Updated Clock Ready Flag with new Bitfield names Updated the INTFLAG Register with new verbiage for the CKRDY Bitfield
OSCCTRL	Updated Clock Failure Detection Operation with new verbiage in the Note under Clock Failure Detection
SUPC	Updated Voltage Regulators with new Active Mode verbiage Updated the BOD33 Register to display the VREFSEL bitfield name instead of REFSEL
PM	Made a minor typographical update to the INTFLAG Register
RTC	Updated Features with new Tamper Detection verbiage Updated the RTC Block Diagram (Tamper Detection Use Case with four tamper inputs/outputs) with minor editorial updates for Tamper Detection Made updates throughout the entire chapter changing Active Layer Protection to Active Tamper Detection Updated the following registers with new notes or other verbiage: CTRLB in COUNT32 Mode TAMPCTRL TAMPCTRLB CTRLB in COUNT16 Mode COUNT in COUNT16 Mode CTRLB in Clock/Calendar Mode
NVMCTRL	Minor Verbiage update to Features
TRAM	Updated the Anti-Tamper verbiage in Features
PORT	Added a new Overview of the PORT Diagram to the Functional Description
EVSYS	Updated the reset value for the CHANNELn Control Register, and verbiage for the ONDEMAND and RUNSTDBY Bitfields
SERCOM	Updated Product naming and note verbiage in Features Updated Product naming in Secure Pin Multiplexing (PIC32CM LS00 Only)
SERCOM USART	Updated the MAXITER bitfield with new verbiage in the CTRLC Register
SERCOM SPI	Removed an erroneous note from Features Updated the note in Signal Description on table 36-1
SERCOM I²C	Updated the DRDY Bitfield with new verbiage for the Client INTFLAG Register Updated the Bitfield access properties for the CMD and QCEN bits in the Host CTRLB Register
TC	Updated the Note in Capture Operations Renamed Event Capture Action to Event Capture Action on Events or I/Os and updated the topic text, along with minor typographical updates to the Input Capture Timing figure Renamed Period and Pulse-Width (PPW) Capture Action to Period and Pulse-Width (PPW/PWP) Capture Action on Events and made minor typographical updates to the PWP Capture figure Renamed Pulse Width Capture Action to Pulse-Width (PW) Capture Action on Events and made minor typographical updates to the Pulse-Width Capture on Channel 0 figure Renamed Time Stamp Capture to Time-Stamp Capture on Events or I/Os and made minor typographical updates to the Time Stamp figure
TCC	Updated the Signal Description with new information for WO_NUM-1 Updated the Waveform Extension Stage Details figure with new Signal naming in Waveform Extension
CCL	Replaced the Block Diagram with an updated version Updated the Linked Lut Input Selection figure in Truth Table Inputs Selection
AC	Minor editorial updates to Features Updated the Block Diagram with a new figure
ADC	Updated the verbiage and equation for the SAMPLEN bitfield in the SAMPCTRL Register
DAC	Added a new note to Events Updated verbiage for the STARTEI1 and STARTEI0 bitfields in the EVCTRL Register
Electrical Characteristics	Made numerous typographical updates and minor updates to the units displayed in each table throughout the section Updated references to REFSEL in Power Supply to VREFSEL Added a new note to the Peripheral Active Current Electrical Specifications table Added a XOSC_34 specification to the External XTAL and Clock AC Electrical Specifications table in XOSC Electrical Specifications Added new 1.8V cases to both USART Electrical Specifications (PL0) and USART Electrical Specifications (PL2) Updated I²S Electrical Specifications (PL2) with new figures and numerous editorial updates to tables 49-38 and 49-39 Added a new chapter called SWD 2-WIRE Electrical Specifications The following sections had numerous updates to their tables for min, typ and/or max values Power Supply CPU Active Power CPU Idle Power CPU Standby Power CPU Off Current Consumption Wake-Up Timing Electrical Specifications I/O Pin Electrical Specifications Internal Voltage Reference Specifications XOSC32K Electrical Specifications OSC16M Electrical Specifications OPAMP Electrical Specifications PTC Electrical Specifications SPI Mode Electrical Specifications (PL0) SPI Mode Electrical Specifications (PL2) USB Electrical Specifications
Packaging Information	Updated the 64-pin VQFN package to the most recent version
Schematic Checklist	Updated the note in External Reset Circuit Made minor editorial updates to Unused or Unconnected Pins Removed obsolete information from Clocks and Crystal Oscillators Updated the table in External Clock Source Updated the figure with minor edits to the signal names in Crystal Oscillator Updated the table in External Slow Clock Source Added a new section called Designing for High-Speed Peripherals

Revision B - November 2020

Along with the changes listed below, numerous typographical updates were done to the document.

The following changes were made to this document:


Section	Updates
512-KB Flash, 64-KB SRAM with TrustZone, Crypto & Enhanced PTC	Updated Core section with a new information for DMIPS
PIC32CM LS00/LS60 Specific Security Features	Added a new topic ATECC608 CryptoAuthentication Device (PIC32CM LS60 only)
Boot ROM	Added a new topic ATECC608x -Based Secure Boot Verification Method
Memories	Updated the PIC32CM LE00 UROW Bitfields Definition Table with new values for 43:42 and 233:44 Updated the PIC32CM LS00 UROW Bitfields Definition Table with a new factory setting for Bit position 42 Updated the PIC32CM LE00 BOCOR Bitfields Definition Table with two new rows for 31:0 and 39:32
PAC	Updated the table for the KEY bit of the WRCTRL Register with the value of SETLOCK for 0x3
DSU	Updated the REVISION Bit of the DID register with information for silicon revisions A0, A1, and B0
OSC32KCTRL	Added a Reserved field to the table for the STARTUP bit in the XOSC32K Register
PM	Updated Sleep Modes with new verbiage
RTC	Updated the COUNT register with a new note
SERCOM SPI	Updated the CTRLB Register for the AMODE bit correcting 2_ADDRS to 2ADDRS
SERCOM I²C	Updated the CTRLB Register for the AMODE bit correcting 2_ADDRS to 2ADDRS
TCC	Updated the EVCTRL Register with new values in the tables for the CNTSEL and EVACT Bits
CCL	Corrected the INSELx bit of the LUTCTRL Register to read [x=0..2]
AC	Updated the table for the MUXPOS Bit of the COMPCTRL Register with a new reserved value for 0x5-0x7
OPAMP	Updated the RESCTRL Register with a new table value for 0x0 for the RES1MUX Bit
Electrical Characteristics	Removed VBUS information from the Absolute Maximum Ratings Updated the Characteristics Column of the Operating Frequency vs. Voltage table to read “Param. No.” Updated the Power Supply Electrical Specifications table with new values for REG_17, REG_19, and REG_21 Removed USB_17 from the USB Electrical Specifications Table Added new sub chapter Peripheral Active Current Specifications The following sections had numerous updates to their tables for min, typ and/or max values Power Supply CPU Active Power CPU Idle Power CPU Standby Power CPU Off Current Consumption Wake-Up Timing Electrical Specifications I/O Pin Electrical Specifications Internal Voltage Reference Specifications XOSC32K Electrical Specifications OSC16M Electrical Specifications OPAMP Electrical Specifications PTC Electrical Specifications SPI Mode Electrical Specifications (PL0) SPI Mode Electrical Specifications (PL2) USB Electrical Specifications
Schematic Checklist	In Power Supply Connections, Figure 52-1 and Figure 52-2 were corrected with the addition of an underscore to the resistor names Reworded Note 3 for the Power Supply Connections Table In External Analog Reference Connections, Figure 52-3 and 52-4 were corrected with the addition of an underscore to the resistor names

Revision A - March 2020

This is the initial released version of this document.