29.6.5 Interrupt Enable Clear

Important: For PIC32CM LS00/LS60 Non-Secure accesses, write accesses (W*) are allowed only if Non-Secure Write is set in the NONSEC register.
This register allows the user to disable an interrupt without doing a read-modify-write operation. Changes in this register will also be reflected in the Interrupt Enable Set register (INTENSET).
Name: INTENCLR
Offset: 0x0C
Reset: 0x00
Property: PAC Write-Protection, Write-Mix-Secure

Bit 76543210 
   NSCHKKEYENVMELOCKEPROGEDONE 
Access RW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RW 
Reset 000000 

Bit 5 – NSCHK Non-secure Check Interrupt Enable

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the NSCHK interrupt enable.

ValueDescription
0 The NSCHK interrupt is disabled
1 The NSCHK interrupt is enabled

Bit 4 – KEYE Key Error Interrupt Enable

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the KEYE interrupt enable.

ValueDescription
0 The KEYE interrupt is disabled
1 The KEYE interrupt is enabled

Bit 3 – NVME NVM internal Error Interrupt Clear

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the NVME interrupt enable.

ValueDescription
0 The NVME interrupt is disabled
1 The NVME interrupt is enabled

Bit 2 – LOCKE Lock Error Interrupt Enable

Writing a '0' to this bit has no effect.

Writing a '1' to this bit sets the LOCKE interrupt enable.

ValueDescription
0 The LOCKE interrupt is disabled
1 The LOCKE interrupt is enabled

Bit 1 – PROGE Programming Error Interrupt Clear

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the PROGE interrupt enable.

ValueDescription
0 The PROGE interrupt is disabled
1 The PROGE interrupt is enabled

Bit 0 – DONE NVM Done Interrupt Enable

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the DONE interrupt enable.

ValueDescription
0 The DONE interrupt is disabled
1 The DONE interrupt is enabled