46.5 Peripheral Dependencies
| Peripheral name | Base address | NVIC IRQ Index | MCLK AHB/APB Clocks | GCLK Peripheral Channel Index (GCLK.PCHCTRL ) | PAC Peripheral Identifier Index (PAC.WRCTRL ) | DMA Trigger Source Index (DMAC.CHCTRLB ) | Events (EVSYS) | Power Domain (PM.STDBYCFG) | |
|---|---|---|---|---|---|---|---|---|---|
| Users (EVSYS.USER) | Generators (EVSYS.CHANNEL) | ||||||||
| DAC | 0x42003C00 | 65: UNDERRUN0-1 66: EMPTY0-1 |
CLK_DAC_APB | 30: GCLK_DAC | 79 | 42-43: EMPTY0-1 |
44-45: START0-1 (PIC32CM5164 / PIC32CM2532) - 22-23: START0-1 (PIC32CM1216) |
82-83: EMPTY0-1 (PIC32CM5164 / PIC32CM2532) - 47-48: EMPTY0-1 (PIC32CM1216) | PDSW |
The DAC has up to two analog output pins (VOUT0, VOUT1) and one analog input pin (VREFA) that must be configured first.
When an internal input is used, it must be enabled before DAC Controller is enabled.
The analog signals of AC, ADC, DAC and OPAMP can be interconnected.
See Analog Connections of Peripherals for details.