44.7.9 Input Control

Note: This register is write-synchronized: SYNCBUSY.INPUTCTRL must be checked to ensure the INPUTCTRL register synchronization is complete.

Name:	INPUTCTRL
Offset:	0x08
Reset:	0x0000
Property:	PAC Write-Protection, Write-Synchronized


Bit	15	14	13	12	11	10	9	8
				MUXNEG[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
				MUXPOS[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0

Bits 12:8 – MUXNEG[4:0] Negative MUX Input Selection

These bits define the MUX selection for the negative ADC input.

Value	Name	Description
0x00	AIN0	ADC AIN0 pin
0x01	AIN1	ADC AIN1 pin
0x02	AIN2	ADC AIN2 pin
0x03	AIN3	ADC AIN3 pin
0x04	AIN4	ADC AIN4 pin
0x05	AIN5	ADC AIN5 pin
0x06	AIN6	ADC AIN6 pin
0x07	AIN7	ADC AIN7 pin
0x08 - 0x17	-	Reserved
0x18	AVSS	Ground
0x19-0x1F	-	Reserved

Bits 4:0 – MUXPOS[4:0] Positive MUX Input Selection

These bits define the MUX selection for the positive ADC input. If the internal bandgap voltage input channel is selected, then the Sampling Time Length bit group in the Sampling Control register must be written with a corresponding value.

Value	Name	Description
0x00	AIN0	ADC AIN0 pin
0x01	AIN1	ADC AIN1 pin
0x02	AIN2	ADC AIN2 pin
0x03	AIN3	ADC AIN3 pin
0x04	AIN4	ADC AIN4 pin
0x05	AIN5	ADC AIN5 pin
0x06	AIN6	ADC AIN6 pin
0x07	AIN7	ADC AIN7 pin
0x08	AIN8	ADC AIN8 pin
0x09	AIN9	ADC AIN9 pin
0x0A	AIN10	ADC AIN10 pin
0x0B	AIN11	ADC AIN11 pin
0x0C	AIN12	ADC AIN12 pin
0x0D	AIN13	ADC AIN13 pin
0x0E	AIN14	ADC AIN14 pin
0x0F	AIN15	ADC AIN15 pin
0x10	AIN16	ADC AIN16 pin
0x11	AIN17	ADC AIN17 pin
0x12	AIN18	ADC AIN18 pin
0x13	AIN19	ADC AIN19 pin
0x14	AIN20	ADC AIN20 pin
0x15	AIN21	ADC AIN21 pin
0x16	AIN22	ADC AIN22 pin
0x17	AIN23	ADC AIN23 pin
0x18	-	Reserved
0x19	BANDGAP	Bandgap Voltage
0x1A	SCALEDVDDCORE	1/4 Scaled VDDCORE Supply
0x1B	SCALEDAVDD	1/4 Scaled AVDD Supply
0x1C	DAC0	DAC0 Output
0x1D	SCALEDVDD	1/4 Scaled VDD Supply
0x1E	OPAMP01	OPAMP0 or OPAMP1 Output
0x1F	OPAMP2	OPAMP2 Output