6.2.6.6 Application Schematics For Use Case Examples
In Use Case 1, the external power stages are made of complementary low-cost MOSFETs. In addition to the RDSON and drain breakdown voltage characteristics, the choice of these components is driven by a low gate threshold voltage, a low input capacitance, a low total gate charge and a fast turn-on time characteristics. Series resistance (10 Ω) added to the gates of the MOSFETs are optional and may be adjusted to optimize the gate drive. They help to limit the output current peaks driven by the I/Os into the MOSFET gates in some cases. The 10 kΩ resistors ensure an off condition when not driven and the capacitor/diode network (C1..C2/D1..D2) shifts the PMOS drive from the typical VDDIO level (3.3V) to a higher supply voltage (e.g., a 5V power domain).
In the Use Case 2 application schematic, the drive network of the MOSFETs gates follows the principles described in Use Case 1.
A coupling capacitor (CC) and an L-C low-pass filter (LF, CF) are added to the output of the power stage to remove both the DC and the high frequency components of the PWM signal. CC with the resistive part of the speaker (RSPK) forms a C-R high pass filter with a corner frequency of fHP = 1 / (2 × PI × CC × RSPK).
LF, CF and RSPK form a second-order low-pass filter of corner frequency fC = 1 / (2 × PI × sqrt (LF × CF)) and of quality factor Q = RSPK × sqrt (CF / LF). As a numerical example, consider the case fHP = 200 Hz, fC = 30 kHz, Q = 0.707 (maximum flat response) with RSPK = 8 Ω. This leads to CC = 100 µF, LF = 60 µH, CF = 470 nF.
In Use Case 3A, the CLASSD is used as an audio DAC. In this case, the differential outputs of the CLASSD are used. The application schematic suggested in figure "Use Case 3A: Stereo Audio DAC With Active differential to Single Low-Pass Filter" above implements a third-order 10 kHz low-pass Butterworth filter and makes the differential to single-ended conversion. Note that in this schematic, the AVDD/2 point needs to be fed at low impedance (e.g., a buffered voltage). A simpler schematic (Use Case 3B) may also be possible, as shown in figure "Use Case 3B: Stereo Audio DAC With Simple Passive Low-Pass Filter and Differential Outputs" above, at the cost of higher out-of-band noise and differential outputs which may be acceptable in some applications.
In Use Case 4A, the CLASSD is used as an audio DAC with active low-pass filter. In this case, the single-ended outputs of the CLASSD are selected (PWMTYP = 0, trailing edge PWM) which leaves more I/Os to the application. A third-order 30 kHz low-pass Butterworth filter is shown in figure "Use Case 4A: Stereo Audio DAC With Active Low-Pass Filter and Single-ended Outputs". The AVDD/2 point can be fed at relatively high impedance as no current is drawn from this point (a simple resistive divider properly decoupled is acceptable). A reduced complexity schematic is presented in figure "Use Case 4B: Stereo Audio DAC With Passive Low-Pass Filter and Single-ended Outputs" above for less constrained applications.