Escape Mode

Escape mode uses the data lanes to communicate asynchronously using the low-power states at low speed. The D-PHY supports this mode in both directions. A data lane enters Escape mode through an Escape mode entry procedure (LP-11, LP-10, LP-00, LP-01, LP-00), if an LP-11 is detected before reaching LP-00 state, the entry is aborted and the receiver returns to the Stop state. Once the sequence is correctly completed, the transmitter sends an 8-bit command to indicate a requested action.

If the entry command is not valid, it is ignored, the error flag ERRESC goes high (DSI_INT_ST0.DPHY_ERRORS_0), and the receiver waits until the transmitter returns to the Stop state.

The D-PHY applies Spaced-One-Hot encoding (a Mark state is interleaved with a Space state) on commands and data. Each symbol consists of the following two parts:

  • One-Hot phase
  • Space state

To transmit one bit, a Mark-1 should be sent followed by the Space state. In the case of a zero bit, a Mark-0 should be sent followed by the Space state.

Table 5-104. Possible Escape Mode Sequences for Data Lanes
Escape Mode ActionEntry Command Pattern

(First Bit to Last Bit to be Transmitted)

Command Type
Low-Power Data Transmission11100001Mode
Ultra-Low-Power State00011110Mode
Reset Trigger01100010Trigger
Unknown - 301011101Trigger
Unknown - 400100001Trigger
Unknown - 510100000Trigger

The Escape mode transition sequencing from state to state is presented in Figure 7-4.

Figure 5-47. Escape Mode Sequence State Diagram
  • Low-Power Data Transmission (LPDT)

In LPDT mode, the data can be transmitted by the protocol at low speed in Low-Power mode. High-speed drivers or receivers are off and low-power drivers or receivers are on. During LPDT, the protocol can pause by maintaining a Space state on the lines.

  • Remote Trigger

Remote Trigger mode allows the protocol to send a flag to the receiving side, at the request of the transmitting side.

  • Ultra-Low-Power State (ULPS)

Ultra-Low-Power State (ULPS) mode has the lowest power consumption, excluding Shutdown mode.

For data lanes, this mode is entered by sending an Ultra-Low-Power state entry command after the Escape mode entry command. During this mode, the lines are in the Space state (LP-00). Although the clock lane does not support regular Escape mode, the clock lane supports ULPS. If all lanes are set to ULPS, the PLL is turned off.

  • Turnaround

The D-PHY allows the transmission direction of the data lanes to be swapped by means of a turnaround request. The sequence of a turnaround operation is described below:

  1. Transmitter side
    1. Starts when the DSI host initiates a turnaround request, assuming the D-PHY is in Stop state
    2. The transmitter sends specific low-power sequence—LP-11, LP-10, LP-00, L-10, L-00 The turnaround operation can be disabled while in power down mode.
  2. Receiver side
    1. After receiving a complete low-power sequence, the receiver enables the low-power driver.
    2. Transmits LP-00, indicating change.
    3. Overlapping LP-00 transmitted by the initial transmitter.
    4. Initial receiver side transmits LP-10, followed by LP-11, returning to Control mode.
Figure 5-48. Turnaround Sequence State Diagram