3.1.3.1 Clocks
Internal memories (SRAM and ROM) and SMC clocks are not controlled by the PMC. MPDDRC and PMECC clocks are controlled by the PMC.
Internal memories (SRAM and ROM) and SMC clocks are not controlled by the PMC. MPDDRC and PMECC clocks are controlled by the PMC.
DS60001813E
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