The flowcharts shown in this section provide examples for read and
write operations. A polling or interrupt method can be used to check the status bits. The
interrupt method requires that the Interrupt Enable register (FLEX_TWI_IER) be configured
first.
Figure 9-117. TWI Write Operation with Single Data Byte without Internal
AddressFigure 9-118. TWI Write Operation with Single Data Byte and Internal
AddressFigure 9-119. TWI Write Operation with Multiple Data Bytes with or without
Internal AddressFigure 9-120. SMBus Write Operation with Multiple Data Bytes with or
without Internal Address and PEC SendingFigure 9-121. SMBus Write Operation with Multiple Data Bytes with PEC and
Alternative Command ModeFigure 9-122. TWI Write Operation with Multiple Data Bytes and Read
Operation with Multiple Data Bytes (Sr)Figure 9-123. TWI Write Operation with Multiple Data Bytes + Read Operation
and Alternative Command Mode + PECFigure 9-124. TWI Read Operation with Single Data Byte without Internal
AddressFigure 9-125. TWI Read Operation with Single Data Byte and Internal
AddressFigure 9-126. TWI Read Operation with Multiple Data Bytes with or without
Internal AddressFigure 9-127. TWI Read Operation with Multiple Data Bytes with or without
Internal Address with PECFigure 9-128. TWI Read Operation with Multiple Data Bytes with Alternative
Command Mode with PECFigure 9-129. TWI Read Operation with Multiple Data Bytes + Write Operation
with Multiple Data Bytes (Sr)Figure 9-130. TWI Read Operation with Multiple Data Bytes + Write with
Alternative Command Mode with PEC
DS60001813E
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.