14.5.25 L2CC Data Lockdown Register
Name: | L2CC_DLKR |
Offset: | 0x900 |
Reset: | 0x00000000 |
Property: | Programmable in Auxiliary Control register. |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
DLK7 | DLK6 | DLK5 | DLK4 | DLK3 | DLK2 | DLK1 | DLK0 | ||
Access | |||||||||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 0, 1, 2, 3, 4, 5, 6, 7 – DLKx Data Lockdown in Way Number x
Value | Description |
---|---|
0 | Allocation can occur in the corresponding way. |
1 | There is no allocation in the corresponding way. |