32.22.33 PMC Asynchronous Partial Wake-Up Disable Register 1
This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode register.
Not all PIDs can be configured with asynchronous partial wake-up.
Only the following PIDs can be configured with asynchronous partial wake-up: FLEXCOMx, SPIx, TWIx, UARTx and ADC.
The values for PIDx are defined in the section “Peripheral Identifiers”.
The following configuration values are valid for all listed bit names of this register:
0: No effect
1: The asynchronous partial wake-up function of the corresponding peripheral is disabled.
Name: | PMC_SLPWK_DR1 |
Offset: | 0x0138 |
Reset: | – |
Property: | Write-only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
PID40 | |||||||||
Access | W | ||||||||
Reset | – |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PID34 | PID33 | ||||||||
Access | W | W | |||||||
Reset | – | – |