32.22.13 PMC Programmable Clock Register

This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode Register.
Name: PMC_PCKx
Offset: 0x40 + x*0x04 [x=0..2]
Reset: 0x00000000
Property: R/W

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
     PRES[7:4] 
Access R/WR/WR/WR/W 
Reset 0000 
Bit 76543210 
 PRES[3:0] CSS[2:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bits 11:4 – PRES[7:0] Programmable Clock Prescaler

Programmable Clock Frequency = Selected Clock Frequency / (PRES + 1)

Bits 2:0 – CSS[2:0] Main System Bus Clock Source Selection

ValueNameDescription
0SLOW_CLKSlow clock is selected.
1MAIN_CLKMain clock is selected.
2PLLA_CLKPLLACK is selected.
3UPLL_CLKUPLL clock is selected.
4MCK_CLKMain System Bus clock is selected.
5AUDIO_CLKAudio PLL clock is selected.