32.22.39 PMC Audio PLL Control Register 1
Name: | PMC_AUDIO_PLL1 |
Offset: | 0x0150 |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
QDAUDIO[4:0] | DIV[1:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
FRACR[21:16] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
FRACR[15:8] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
FRACR[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 30:26 – QDAUDIO[4:0] Output Divider Ratio for Pad Clock
faudio = fref × ((ND + 1) + FRACR ÷ 222) / (DIV x QDAUDIO)
Bits 25:24 – DIV[1:0] Divider Value
Value | Name | Description |
---|---|---|
0 | FORBIDDEN |
Reserved |
1 | FORBIDDEN |
Reserved |
2 | DIV2 |
Divide by 2 |
3 | DIV3 |
Divide by 3 |